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/Linux-v6.1/arch/arm/boot/dts/
Dexynos5420-galaxy-tab-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
10 /dts-v1/;
12 #include "exynos5420-cpus.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
18 chassis-type = "tablet";
24 * The same hack is also needed to boot exynos4412-i9300 with
27 * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
[all …]
Drk3288-evb-rk808.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3288-evb.dtsi"
8 compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
12 clock-frequency = <400000>;
17 interrupt-parent = <&gpio0>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pmic_int &global_pwroff>;
21 rockchip,system-power-controller;
22 wakeup-source;
[all …]
Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
26 regulator-max-microvolt = <12000000>;
[all …]
De60k02.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 * found in ebook-readers like the Kobo Clara HD (with i.MX6SLL) and
14 #include <dt-bindings/input/input.h>
19 stdout-path = &uart1;
22 gpio_keys: gpio-keys {
23 compatible = "gpio-keys";
25 key-power {
29 wakeup-source;
32 key-cover {
36 linux,input-type = <EV_SW>;
[all …]
De70k02.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 * found in ebook-readers like the Kobo Clara HD (with i.MX6SLL) and
14 #include <dt-bindings/input/input.h>
23 stdout-path = &uart1;
26 gpio_keys: gpio-keys {
27 compatible = "gpio-keys";
29 key-power {
33 wakeup-source;
36 key-cover {
40 linux,input-type = <EV_SW>;
[all …]
Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
23 stdout-path = "serial2:115200n8";
27 compatible = "samsung,secure-firmware";
31 fixed-rate-clocks {
[all …]
Drk3036-kylin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
9 compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
16 leds: gpio-leds {
17 compatible = "gpio-leds";
19 work_led: led-0 {
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_ctl>;
27 sdio_pwrseq: sdio-pwrseq {
28 compatible = "mmc-pwrseq-simple";
[all …]
Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
[all …]
Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
Drk3288-tinker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
27 gpio-keys {
[all …]
Dexynos5420-arndale-octa.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
27 stdout-path = "serial3:115200n8";
31 compatible = "samsung,secure-firmware";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Dpx30-engicam-px30-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "engicam,px30-core", "rockchip,px30";
21 cpu-supply = <&vdd_arm>;
25 cpu-supply = <&vdd_arm>;
29 cpu-supply = <&vdd_arm>;
33 cpu-supply = <&vdd_arm>;
37 cap-mmc-highspeed;
38 mmc-hs200-1_8v;
[all …]
Drk3566-roc-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
12 compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
[all …]
Drk3399-rock960.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "rk3399-opp.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
19 sdio_pwrseq: sdio-pwrseq {
20 compatible = "mmc-pwrseq-simple";
22 clock-names = "ext_clock";
23 pinctrl-names = "default";
24 pinctrl-0 = <&wifi_enable_h>;
25 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
28 vcc12v_dcin: vcc12v-dcin {
[all …]
Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
19 compatible = "pwm-backlight";
20 brightness-levels = <
53 default-brightness-level = <200>;
57 edp_panel: edp-panel {
58 compatible = "lg,lp079qx1-sp0v";
60 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
[all …]
Drk3399pro-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
20 vcc3v3_pcie: vcc-pcie-regulator {
21 compatible = "regulator-fixed";
22 enable-active-high;
24 pinctrl-names = "default";
25 pinctrl-0 = <&pcie_pwr>;
[all …]
Drk3568-evb1-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
16 compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
26 stdout-path = "serial2:1500000n8";
29 dc_12v: dc-12v {
30 compatible = "regulator-fixed";
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
23 stdout-path = "serial5:115200n8";
26 adc-keys {
27 compatible = "adc-keys";
28 io-channels = <&saradc 2>;
[all …]
Drk3399-sapphire.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "dt-bindings/pwm/pwm.h"
7 #include "dt-bindings/input/input.h"
9 #include "rk3399-opp.dtsi"
12 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
[all …]
Drk3399-puma.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-opp.dtsi"
16 compatible = "gpio-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&module_led_pin>;
20 module_led: led-0 {
23 linux,default-trigger = "heartbeat";
24 panic-indicator;
28 extcon_usb3: extcon-usb3 {
[all …]
Drk3566-quartz64-b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 Quartz64-B Board";
12 compatible = "pine64,quartz64-b", "rockchip,rk3566";
22 stdout-path = "serial2:1500000n8";
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk817
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
35 clock-output-names:
39 rockchip,system-power-controller:
[all …]
Drockchip,rk818.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk818
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
38 rockchip,system-power-controller:
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mm-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/net/ti-dp83867.h>
11 model = "PHYTEC phyCORE-i.MX8MM";
12 compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm";
24 reg_vdd_3v3_s: regulator-vdd-3v3-s {
25 compatible = "regulator-fixed";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-max-microvolt = <3300000>;
29 regulator-min-microvolt = <3300000>;
[all …]

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