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/Linux-v6.6/arch/arm/boot/dts/rockchip/
Drk3288-evb-rk808.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3288-evb.dtsi"
8 compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
12 clock-frequency = <400000>;
17 interrupt-parent = <&gpio0>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pmic_int &global_pwroff>;
21 rockchip,system-power-controller;
22 wakeup-source;
[all …]
Drk3036-kylin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
9 compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
16 leds: gpio-leds {
17 compatible = "gpio-leds";
19 work_led: led-0 {
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_ctl>;
27 sdio_pwrseq: sdio-pwrseq {
28 compatible = "mmc-pwrseq-simple";
[all …]
Drk3288-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vccio_flash";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
19 vin-supply = <&vcc_io>;
[all …]
Drv1126-edgeble-neu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
14 vccio_flash: vccio-flash-regulator {
15 compatible = "regulator-fixed";
16 enable-active-high;
18 pinctrl-names = "default";
19 pinctrl-0 = <&flash_vol_sel>;
20 regulator-name = "vccio_flash";
21 regulator-always-on;
22 regulator-boot-on;
[all …]
Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
26 regulator-max-microvolt = <12000000>;
[all …]
/Linux-v6.6/arch/arm64/boot/dts/rockchip/
Drk3588-edgeble-neu6b.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588";
13 vcc12v_dcin: vcc12v-dcin-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc12v_dcin";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <12000000>;
19 regulator-max-microvolt = <12000000>;
22 vcc5v0_sys: vcc5v0-sys-regulator {
[all …]
Drk3588-evb1-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
15 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
23 stdout-path = "serial2:1500000n8";
27 compatible = "pwm-backlight";
28 power-supply = <&vcc12v_dcin>;
32 vcc12v_dcin: vcc12v-dcin-regulator {
33 compatible = "regulator-fixed";
[all …]
Drk3588-rock-5b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
10 compatible = "radxa,rock-5b", "rockchip,rk3588";
19 stdout-path = "serial2:1500000n8";
22 analog-sound {
23 compatible = "audio-graph-card";
24 label = "rk3588-es8316";
34 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
35 pinctrl-names = "default";
[all …]
Dpx30-engicam-px30-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "engicam,px30-core", "rockchip,px30";
21 cpu-supply = <&vdd_arm>;
25 cpu-supply = <&vdd_arm>;
29 cpu-supply = <&vdd_arm>;
33 cpu-supply = <&vdd_arm>;
37 cap-mmc-highspeed;
38 mmc-hs200-1_8v;
[all …]
Drk3588s-rock-5a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "radxa,rock-5a", "rockchip,rk3588s";
20 analog-sound {
21 compatible = "audio-graph-card";
22 label = "rk3588-es8316";
35 stdout-path = "serial2:1500000n8";
[all …]
Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
19 compatible = "pwm-backlight";
20 brightness-levels = <
53 default-brightness-level = <200>;
57 edp_panel: edp-panel {
58 compatible = "lg,lp079qx1-sp0v";
60 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
[all …]
Drk3588s-indiedroid-nova.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/usb/pd.h>
22 stdout-path = "serial2:1500000n8";
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
27 clock-names = "ext_clock";
29 pinctrl-0 = <&wifi_enable_h>;
[all …]
Drk3568-radxa-cm3i.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/rockchip.h>
16 stdout-path = "serial2:115200n8";
19 gpio-leds {
20 compatible = "gpio-leds";
22 led_user: led-0 {
26 linux,default-trigger = "heartbeat";
27 pinctrl-names = "default";
[all …]
Drk3399pro-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
20 vcc3v3_pcie: vcc-pcie-regulator {
21 compatible = "regulator-fixed";
22 enable-active-high;
24 pinctrl-names = "default";
25 pinctrl-0 = <&pcie_pwr>;
[all …]
Dpx30-ringneck.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
18 emmc_pwrseq: emmc-pwrseq {
19 compatible = "mmc-pwrseq-emmc";
20 pinctrl-0 = <&emmc_reset>;
21 pinctrl-names = "default";
22 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
[all …]
Drk3568-fastrhino-r66s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 stdout-path = "serial2:1500000n8";
16 gpio-keys {
17 compatible = "gpio-keys";
[all …]
Drk3566-radxa-cm3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
18 compatible = "gpio-leds";
20 led-0 {
24 linux,default-trigger = "timer";
25 default-state = "on";
26 pinctrl-names = "default";
27 pinctrl-0 = <&user_led2>;
31 vcc_sys: vcc-sys-regulator {
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
23 stdout-path = "serial5:115200n8";
26 adc-keys {
27 compatible = "adc-keys";
28 io-channels = <&saradc 2>;
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/mfd/
Drockchip,rk806.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sebastian.reichel@collabora.com>
19 - rockchip,rk806
27 gpio-controller: true
29 '#gpio-cells':
32 vcc1-supply:
34 The input supply for dcdc-reg1.
36 vcc2-supply:
[all …]
Drockchip,rk818.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk818
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
33 clock-output-names:
38 rockchip,system-power-controller:
[all …]
Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk817
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
35 clock-output-names:
39 rockchip,system-power-controller:
[all …]
Drockchip,rk809.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk809
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
38 rockchip,system-power-controller:
[all …]
/Linux-v6.6/arch/arm/boot/dts/samsung/
Dexynos5422-samsung-k3g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy S5 (SM-G900H) device-tree source
8 /dts-v1/;
9 #include <dt-bindings/clock/samsung,s2mps11.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "exynos5422-cpus.dtsi"
16 model = "Samsung Galaxy S5 (SM-G900H)";
20 chassis-type = "handset";
31 fixed-rate-clocks {
[all …]
Dexynos5420-galaxy-tab-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Base DT for Samsung's family of tablets based on Exynos5420.
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
10 /dts-v1/;
12 #include "exynos5420-cpus.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
18 chassis-type = "tablet";
23 * page table pointer has been updated in __common_mmu_cache_on.
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/regulator/
Dmcp16502-regulator.txt4 - compatible: "microchip,mcp16502"
5 - reg: I2C slave address
6 - lpm-gpios: GPIO for LPM pin. Note that this GPIO *must* remain high during
7 suspend-to-ram, keeping the PMIC into HIBERNATE mode; this
9 - regulators: A node that houses a sub-node for each regulator within
10 the device. Each sub-node is identified using the node's
11 name. The content of each sub-node is defined by the
12 standard binding for regulators; see regulator.txt.
15 1) VDD_IO - Buck (1.2 - 3.7 V)
16 2) VDD_DDR - Buck (0.6 - 1.85 V)
[all …]

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