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/Linux-v6.1/Documentation/devicetree/bindings/regulator/
Dmaxim,max8952.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
19 max8952,default-mode:
25 max8952,dvs-mode-microvolt:
35 max8952,en-gpio:
40 max8952,ramp-speed:
45 Voltage ramp speed, values map to:
[all …]
/Linux-v6.1/arch/arm64/boot/dts/hisilicon/
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
45 compatible = "linux,extcon-usb-gpio";
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Dmsm8998-sony-xperia-yoshino.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
18 qcom,msm-id = <0x124 0x20000>, <0x124 0x20001>; /* 8998v2, v2.1 */
19 qcom,board-id = <8 0>;
23 compatible = "gpio-gate-clock";
24 pinctrl-0 = <&audio_mclk_pin>;
25 pinctrl-names = "default";
27 #clock-cells = <0>;
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/Linux-v6.1/Documentation/hwmon/
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
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Ddme1737.rst18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
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/Linux-v6.1/drivers/cpufreq/
Dpmac64-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 * and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
41 #define PCR_SPEED_FULL 0x00000000U /* 1:1 speed value */
42 #define PCR_SPEED_HALF 0x00020000U /* 1:2 speed value */
43 #define PCR_SPEED_QUARTER 0x00040000U /* 1:4 speed value */
44 #define PCR_SPEED_MASK 0x000e0000U /* speed mask */
57 #define PSR_CUR_SPEED_MASK 0x0300000000000000U /* current speed */
61 * The G5 only supports two frequencies (Quarter speed is not supported)
73 * the various frequencies, retrieved from the device-tree
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/Linux-v6.1/arch/arm/boot/dts/
Dr8a7745-iwg22d-sodimm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board
9 * SSI-SGTL5000
21 * You can use Volume Ramp
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
31 /dts-v1/;
32 #include "r8a7745-iwg22m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
[all …]
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
32 key-power {
36 debounce-interval = <100>;
[all …]
Dimx7d-zii-rmu2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * RMU - Remote Modem Unit
10 /dts-v1/;
11 #include <dt-bindings/thermal/thermal.h>
16 compatible = "zii,imx7d-rmu2", "fsl,imx7d";
19 stdout-path = &uart2;
22 gpio-leds {
23 compatible = "gpio-leds";
24 pinctrl-0 = <&pinctrl_leds_debug>;
25 pinctrl-names = "default";
[all …]
Dimx7d-zii-rpu2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * RPU - Remote Peripheral Unit
10 /dts-v1/;
11 #include <dt-bindings/thermal/thermal.h>
16 compatible = "zii,imx7d-rpu2", "fsl,imx7d";
19 stdout-path = &uart2;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <24576000>;
28 cs2000_in_dummy: dummy-oscillator {
[all …]
Dimx6q-display5.dtsi5 * This file is dual-licensed: you can use it either under the terms
38 /dts-v1/;
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/pwm/pwm.h>
44 #include <dt-bindings/sound/fsl-imx-audmux.h>
56 compatible = "pwm-backlight";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_backlight>;
60 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
86 default-brightness-level = <250>;
[all …]
/Linux-v6.1/drivers/regulator/
Danatop-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
42 /* check whether need to care about LDO ramp up speed */ in anatop_regmap_set_voltage_time_sel()
43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()
45 * the delay for LDO ramp up time is in anatop_regmap_set_voltage_time_sel()
48 * ramp up, and how much delay needed. (us) in anatop_regmap_set_voltage_time_sel()
50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()
51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()
52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()
53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
[all …]
Dmax8952.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * max8952.c - Voltage and current regulation for the Maxim 8952
46 int ret = i2c_smbus_read_byte_data(max8952->client, reg); in max8952_read_reg()
57 return i2c_smbus_write_byte_data(max8952->client, reg, value); in max8952_write_reg()
66 return -EINVAL; in max8952_list_voltage()
68 return (max8952->pdata->dvs_mode[selector] * 10 + 770) * 1000; in max8952_list_voltage()
76 if (max8952->vid0) in max8952_get_voltage_sel()
78 if (max8952->vid1) in max8952_get_voltage_sel()
89 if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { in max8952_set_voltage_sel()
91 return -EPERM; in max8952_set_voltage_sel()
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/Linux-v6.1/arch/arm/mach-omap2/
Dvc.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include "prm-regbits-34xx.h"
20 #include "prm-regbits-44xx.h"
52 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
101 * omap_vc_config_channel - configure VC channel to PMIC mappings
106 * - i2c slave address (SA)
107 * - voltage configuration address (RAV)
108 * - command configuration address (RAC) and enable bit (RACEN)
109 * - command values for ON, ONLP, RET and OFF (CMD)
112 * non-default channel. Starting with OMAP4, there are more than 2
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/Linux-v6.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h6-orangepi-3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
21 stdout-path = "serial0:115200n8";
25 compatible = "hdmi-connector";
26 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
31 remote-endpoint = <&hdmi_out_con>;
[all …]
/Linux-v6.1/Documentation/driver-api/thermal/
Dpower_allocator.rst6 -----------
20 --------------
23 Proportional-Integral-Derivative controller (PID controller) with
29 - e = desired_temperature - current_temperature
30 - err_integral is the sum of previous errors
31 - diff_err = e - previous_error
39 | +----------+ +---+
40 | +----->| diff_err |-->| X |------+
41 | | +----------+ +---+ |
47 +---+ | +-------+ +---+ +---+ +---+ +----------+
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/Linux-v6.1/sound/soc/codecs/
Dwm8350.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8350.c -- WM8350 ALSA SoC audio driver
5 * Copyright (C) 2007-12 Wolfson Microelectronics PLC.
48 u16 ramp; member
73 * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
77 struct wm8350_output *out1 = &wm8350_data->out1; in wm8350_out1_ramp_step()
78 struct wm8350 *wm8350 = wm8350_data->wm8350; in wm8350_out1_ramp_step()
86 if (out1->ramp == WM8350_RAMP_UP) { in wm8350_out1_ramp_step()
87 /* ramp step up */ in wm8350_out1_ramp_step()
88 if (val < out1->left_vol) { in wm8350_out1_ramp_step()
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Dcs4234.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
44 /* -89.92dB to +6.02dB with step of 0.38dB */
45 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
96 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
98 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
99 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
103 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
105 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
106 dev_err(component->dev, "Can't change group delay while DAC are ON\n"); in cs4234_dac14_grp_delay_put()
[all …]
Dpcm512x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
96 /* Page 0, Register 1 - reset */
100 /* Page 0, Register 2 - power */
106 /* Page 0, Register 3 - mute */
112 /* Page 0, Register 4 - PLL */
118 /* Page 0, Register 7 - DSP */
124 /* Page 0, Register 8 - GPIO output enable */
132 /* Page 0, Register 9 - BCK, LRCLK configuration */
140 /* Page 0, Register 12 - Master mode BCK, LRCLK reset */
146 /* Page 0, Register 13 - PLL reference */
[all …]
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3399-sapphire.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "dt-bindings/pwm/pwm.h"
7 #include "dt-bindings/input/input.h"
9 #include "rk3399-opp.dtsi"
12 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
[all …]
Drk3328-rock64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
19 stdout-path = "serial2:1500000n8";
22 gmac_clkin: external-gmac-clock {
23 compatible = "fixed-clock";
24 clock-frequency = <125000000>;
25 clock-output-names = "gmac_clkin";
26 #clock-cells = <0>;
29 vcc_sd: sdmmc-regulator {
30 compatible = "regulator-fixed";
[all …]
Drk3566-quartz64-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 Quartz64-A Board";
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mn-bsh-smm-s2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 stdout-path = &uart4;
16 fec_supply: fec-supply-en {
17 compatible = "regulator-fixed";
18 vin-supply = <&buck4_reg>;
19 regulator-name = "tja1101_en";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
23 enable-active-high;
[all …]

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