Searched +full:r8a774c0 +full:- +full:pcie +full:- +full:ep (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/4 ---5 $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Renesas R-Car PCIe Endpoint11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>17 - enum:18 - renesas,r8a774a1-pcie-ep # RZ/G2M[all …]
1 // SPDX-License-Identifier: GPL-2.03 * PCIe endpoint driver for Renesas R-Car SoCs6 * Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>16 #include <linux/pci-epc.h>20 #include "pcie-rcar.h"24 /* Structure representing the PCIe interface */26 struct rcar_pcie pcie; member36 static void rcar_pcie_ep_hw_init(struct rcar_pcie *pcie) in rcar_pcie_ep_hw_init() argument40 rcar_pci_write_reg(pcie, 0, PCIETCTLR); in rcar_pcie_ep_hw_init()43 rcar_pci_write_reg(pcie, 0, PCIEMSR); in rcar_pcie_ep_hw_init()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the RZ/G2E (R8A774C0) SoC5 * Copyright (C) 2018-2019 Renesas Electronics Corp.8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/power/r8a774c0-sysc.h>13 compatible = "renesas,r8a774c0";14 #address-cells = <2>;15 #size-cells = <2>;23 compatible = "fixed-clock";[all …]
