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Searched +full:qcom +full:- +full:cpufreq +full:- +full:nvmem (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/drivers/cpufreq/
Dqcom-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
7 * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
10 * defines the voltage and frequency value based on the msm-id in SMEM
12 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
15 * operating-points-v2 table when it is parsed by the OPP framework.
23 #include <linux/nvmem-consumer.h>
30 #include <linux/soc/qcom/smem.h>
117 /* 4 bits of PVS are in efuse register bits 31, 8-6. */ in get_krait_bin_format_b()
153 /* The first 4 bytes are format, next to them is the actual msm-id */ in qcom_cpufreq_get_msm_id()
185 return -ENODEV; in qcom_cpufreq_kryo_name_version()
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "CPUFreq driver based on the ACPI CPPC spec"
11 This adds a CPUFreq driver which uses CPPC methods
23 bool "Frequency Invariance support for CPPC cpufreq driver"
27 This extends frequency invariance support in the CPPC cpufreq driver,
33 tristate "Allwinner nvmem based SUN50I CPUFreq driver"
38 This adds the nvmem based CPUFreq driver for Allwinner
42 module will be called sun50i-cpufreq-nvmem.
45 tristate "Armada 37xx CPUFreq support"
48 This adds the CPUFreq driver support for Marvell Armada 37xx SoCs.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # CPUfreq core
3 obj-$(CONFIG_CPU_FREQ) += cpufreq.o freq_table.o
5 # CPUfreq stats
6 obj-$(CONFIG_CPU_FREQ_STAT) += cpufreq_stats.o
8 # CPUfreq governors
9 obj-$(CONFIG_CPU_FREQ_GOV_PERFORMANCE) += cpufreq_performance.o
10 obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += cpufreq_powersave.o
11 obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o
12 obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o
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/Linux-v6.1/Documentation/devicetree/bindings/cpufreq/
Dqcom-cpufreq-nvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM CPUFreq bindings
10 - Ilia Lin <ilia.lin@kernel.org>
17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
25 - qcom,apq8064
26 - qcom,apq8096
27 - qcom,ipq8064
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/Linux-v6.1/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP bindings
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
29 const: operating-points-v2-kryo-cpu
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/Linux-v6.1/drivers/thermal/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
37 int "Emergency poweroff delay in milli-seconds"
132 bool "Fair-share thermal governor"
134 Enable this to manage platform thermals using fair-share governor.
228 memory-mapped reads to get the temperature. Any HW/System that
229 allows temperature reading by a single memory-mapped reading, be it
241 thermal framework. cpufreq is used as the cooling device to throttle
247 depends on NVMEM || !NVMEM
253 cpufreq is used as the cooling device to throttle CPUs when the
274 cpufreq is used as the cooling device to throttle CPUs when the passive
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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
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Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/gpio/gpio.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/Linux-v6.1/drivers/soc/qcom/
Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
272 val = readl_relaxed(drv->base + offset); in cpr_masked_write()
275 writel_relaxed(val, drv->base + offset); in cpr_masked_write()
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