| /Linux-v6.1/arch/x86/platform/intel-mid/ |
| D | pwr.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 * pci_platform_pm_ops (see drivers/pci/pci-mid.c).
27 #include <asm/intel-mid.h>
106 static u32 mid_pwr_get_state(struct mid_pwr *pwr, int reg) in mid_pwr_get_state() argument
108 return readl(pwr->regs + PM_SSS(reg)); in mid_pwr_get_state()
111 static void mid_pwr_set_state(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_state() argument
113 writel(value, pwr->regs + PM_SSC(reg)); in mid_pwr_set_state()
116 static void mid_pwr_set_wake(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_wake() argument
118 writel(value, pwr->regs + PM_WKC(reg)); in mid_pwr_set_wake()
121 static void mid_pwr_interrupt_disable(struct mid_pwr *pwr) in mid_pwr_interrupt_disable() argument
[all …]
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| /Linux-v6.1/drivers/input/misc/ |
| D | mc13783-pwrbutton.c | 4 * Based on twl4030-pwrbutton driver by:
5 * Peter De Schrijver <peter.de-schrijver@nokia.com>
19 * Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335 USA
33 struct input_dev *pwr; member
60 mc13xxx_irq_ack(priv->mc13783, irq); in button_irq()
61 mc13xxx_reg_read(priv->mc13783, MC13783_REG_INTERRUPT_SENSE_1, &val); in button_irq()
66 if (priv->flags & MC13783_PWRB_B1_POL_INVERT) in button_irq()
68 input_report_key(priv->pwr, priv->keymap[0], val); in button_irq()
73 if (priv->flags & MC13783_PWRB_B2_POL_INVERT) in button_irq()
75 input_report_key(priv->pwr, priv->keymap[1], val); in button_irq()
[all …]
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| D | tps65218-pwrbutton.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
7 * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
49 { .compatible = "ti,tps65217-pwrbutton", .data = &tps65217_data },
50 { .compatible = "ti,tps65218-pwrbutton", .data = &tps65218_data },
57 struct tps6521x_pwrbutton *pwr = _pwr; in tps6521x_pb_irq() local
58 const struct tps6521x_data *tps_data = pwr->data; in tps6521x_pb_irq()
59 unsigned int reg; in tps6521x_pb_irq() local
62 error = regmap_read(pwr->regmap, tps_data->reg_status, ®); in tps6521x_pb_irq()
64 dev_err(pwr->dev, "can't read register: %d\n", error); in tps6521x_pb_irq()
[all …]
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| D | pmic8xxx-pwrkey.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
72 * struct pmic8xxx_pwrkey - pmic8xxx pwrkey information
85 struct input_dev *pwr = _pwr; in pwrkey_press_irq() local
87 input_report_key(pwr, KEY_POWER, 1); in pwrkey_press_irq()
88 input_sync(pwr); in pwrkey_press_irq()
95 struct input_dev *pwr = _pwr; in pwrkey_release_irq() local
97 input_report_key(pwr, KEY_POWER, 0); in pwrkey_release_irq()
98 input_sync(pwr); in pwrkey_release_irq()
108 enable_irq_wake(pwrkey->key_press_irq); in pmic8xxx_pwrkey_suspend()
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12026.txt | 5 at bus address 0x57. The canonical "reg" value will be for the RTC portion.
9 - "compatible": must be "isil,isl12026"
10 - "reg": I2C bus address of the device (always 0x6f)
14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
25 reg = <0x6f>;
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
|
| /Linux-v6.1/Documentation/devicetree/bindings/regulator/ |
| D | st,stm32mp1-pwr-reg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP1 PWR voltage regulators
10 - Pascal Paillet <p.paillet@foss.st.com>
14 const: st,stm32mp1,pwr-reg
16 reg:
19 vdd-supply:
22 vdd_3v3_usbfs-supply:
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
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| /Linux-v6.1/drivers/phy/samsung/ |
| D | phy-s5pv210-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
12 #include "phy-samsung-usb2.h"
70 static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg) in s5pv210_rate_to_clk() argument
74 *reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ; in s5pv210_rate_to_clk()
77 *reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ; in s5pv210_rate_to_clk()
80 *reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ; in s5pv210_rate_to_clk()
83 return -EINVAL; in s5pv210_rate_to_clk()
91 struct samsung_usb2_phy_driver *drv = inst->drv; in s5pv210_isol()
94 switch (inst->cfg->id) { in s5pv210_isol()
[all …]
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| D | phy-exynos4210-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4210 support
13 #include "phy-samsung-usb2.h"
87 /* Mode switching SUB Device <-> Host */
105 static int exynos4210_rate_to_clk(unsigned long rate, u32 *reg) in exynos4210_rate_to_clk() argument
109 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_12MHZ; in exynos4210_rate_to_clk()
112 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_24MHZ; in exynos4210_rate_to_clk()
115 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_48MHZ; in exynos4210_rate_to_clk()
118 return -EINVAL; in exynos4210_rate_to_clk()
126 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4210_isol()
[all …]
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| D | phy-exynos4x12-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
13 #include "phy-samsung-usb2.h"
114 /* Mode switching SUB Device <-> Host */
132 static int exynos4x12_rate_to_clk(unsigned long rate, u32 *reg) in exynos4x12_rate_to_clk() argument
138 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_9MHZ6; in exynos4x12_rate_to_clk()
141 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_10MHZ; in exynos4x12_rate_to_clk()
144 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_12MHZ; in exynos4x12_rate_to_clk()
147 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_19MHZ2; in exynos4x12_rate_to_clk()
150 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_20MHZ; in exynos4x12_rate_to_clk()
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/gpu/ |
| D | nvidia,gk20a.txt | 4 - compatible: "nvidia,<gpu>"
6 - nvidia,gk20a
7 - nvidia,gm20b
8 - nvidia,gp10b
9 - nvidia,gv11b
10 - reg: Physical base address and length of the controller's registers.
12 - first entry for bar0
13 - second entry for bar1
14 - interrupts: Must contain an entry for each entry in interrupt-names.
15 See ../interrupt-controller/interrupts.txt for details.
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/ata/ |
| D | ahci-st.txt | 6 - compatible : Must be "st,ahci"
7 - reg : Physical base addresses and length of register sets
8 - interrupts : Interrupt associated with the SATA device
9 - interrupt-names : Associated name must be; "hostc"
10 - clocks : The phandle for the clock
11 - clock-names : Associated name must be; "ahci_clk"
12 - phys : The phandle for the PHY port
13 - phy-names : Associated name must be; "ahci_phy"
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
[all …]
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| /Linux-v6.1/drivers/rtc/ |
| D | rtc-isl12026.c | 1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/nvmem-provider.h>
43 static int isl12026_read_reg(struct i2c_client *client, int reg) in isl12026_read_reg() argument
45 u8 addr[] = {0, reg}; in isl12026_read_reg()
51 .addr = client->addr, in isl12026_read_reg()
56 .addr = client->addr, in isl12026_read_reg()
63 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in isl12026_read_reg()
65 dev_err(&client->dev, "read reg error, ret=%d\n", ret); in isl12026_read_reg()
66 ret = ret < 0 ? ret : -EIO; in isl12026_read_reg()
79 .addr = client->addr, in isl12026_arm_write()
[all …]
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| /Linux-v6.1/drivers/soc/tegra/ |
| D | flowctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
74 unsigned int reg; in flowctrl_cpu_suspend_enter() local
77 reg = flowctrl_read_cpu_csr(cpuid); in flowctrl_cpu_suspend_enter()
81 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP; in flowctrl_cpu_suspend_enter()
83 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP; in flowctrl_cpu_suspend_enter()
84 /* pwr gating on wfe */ in flowctrl_cpu_suspend_enter()
85 reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid; in flowctrl_cpu_suspend_enter()
91 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP; in flowctrl_cpu_suspend_enter()
93 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP; in flowctrl_cpu_suspend_enter()
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,iproc-gpio.txt | 5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
[all …]
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | armada-xp-synology-ds414.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
[all …]
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| D | imx53-cx9020.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * based on imx53-qsb.dts
7 /dts-v1/;
15 stdout-path = &uart2;
20 reg = <0x70000000 0x20000000>,
24 display-0 {
25 #address-cells =<1>;
26 #size-cells = <0>;
27 compatible = "fsl,imx-parallel-display";
28 interface-pix-fmt = "rgb24";
[all …]
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| D | armada-388-gp.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * (RD-88F6820-GP)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 /dts-v1/;
12 #include "armada-388.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Marvell Armada 388 DB-88F6820-GP";
17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
20 stdout-path = "serial0:115200n8";
25 reg = <0x00000000 0x80000000>; /* 2 GB */
[all …]
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| D | armada-370-dlink-dns327l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
30 reg = <0x00000000 0x20000000>; /* 512 MiB */
[all …]
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| D | rk3066a-rayeager.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
22 reg = <0x60000000 0x40000000>;
25 ir: ir-receiver {
26 compatible = "gpio-ir-receiver";
28 pinctrl-names = "default";
29 pinctrl-0 = <&ir_int>;
32 keys: gpio-keys {
[all …]
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| D | kirkwood-synology.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
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| D | armada-370-mirabox.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
22 reg = <0x00000000 0x20000000>; /* 512 MB */
30 internal-regs {
35 clock-frequency = <600000000>;
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)
3 * Copyright(c) 2016-2018 Broadcom
7 #include <dt-bindings/gpio/gpio.h>
18 stdout-path = "serial0:115200n8";
23 reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
28 phy-mode = "rgmii-id";
29 phy-handle = <&gphy0>;
37 non-removable;
38 full-pwr-cycle;
42 full-pwr-cycle;
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/usb/ |
| D | fsl-usb.txt | 9 - compatible : Should be "fsl-usb2-mph" for multi port host USB
10 controllers, or "fsl-usb2-dr" for dual role USB controllers
11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
14 - phy_type : For multi port host USB controllers, should be one of
17 - reg : Offset and length of the register set for the device
18 - port0 : boolean; if defined, indicates port0 is connected for
19 fsl-usb2-mph compatible controllers. Either this property or
20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible
22 - port1 : boolean; if defined, indicates port1 is connected for
[all …]
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| /Linux-v6.1/drivers/soc/rockchip/ |
| D | pm_domains.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <dt-bindings/power/px30-power.h>
22 #include <dt-bindings/power/rockchip,rv1126-power.h>
23 #include <dt-bindings/power/rk3036-power.h>
24 #include <dt-bindings/power/rk3066-power.h>
25 #include <dt-bindings/power/rk3128-power.h>
26 #include <dt-bindings/power/rk3188-power.h>
27 #include <dt-bindings/power/rk3228-power.h>
28 #include <dt-bindings/power/rk3288-power.h>
29 #include <dt-bindings/power/rk3328-power.h>
[all …]
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