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/Linux-v5.15/Documentation/devicetree/bindings/net/
Dintel,ixp46x-ptp-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Intel IXP46x PTP Timer (TSYNC)
11 - Linus Walleij <linus.walleij@linaro.org>
14 The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
15 Assist and Time Synchronization Hardware Assist TSYNC provides a PTP
16 timer. It exists in the Intel IXP45x and IXP46x XScale SoCs.
20 const: intel,ixp46x-ptp-timer
[all …]
Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dclock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
36 #include <rdma/mlx5-abi.h>
85 return -EOPNOTSUPP; in mlx5_set_mtutc()
97 timer_h = ioread32be(real_time ? &dev->iseg->real_time_h : in mlx5_read_time()
98 &dev->iseg->internal_timer_h); in mlx5_read_time()
100 timer_l = ioread32be(real_time ? &dev->iseg->real_time_l : in mlx5_read_time()
101 &dev->iseg->internal_timer_l); in mlx5_read_time()
103 timer_h1 = ioread32be(real_time ? &dev->iseg->real_time_h : in mlx5_read_time()
104 &dev->iseg->internal_timer_h); in mlx5_read_time()
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Dclock.h14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
62 return mdev->clock.ptp ? ptp_clock_index(mdev->clock.ptp) : -1; in mlx5_clock_get_ptp_index()
68 struct mlx5_timer *timer = &clock->timer; in mlx5_timecounter_cyc2time() local
73 seq = read_seqbegin(&clock->lock); in mlx5_timecounter_cyc2time()
74 nsec = timecounter_cyc2time(&timer->tc, timestamp); in mlx5_timecounter_cyc2time()
75 } while (read_seqretry(&clock->lock, seq)); in mlx5_timecounter_cyc2time()
94 return -1; in mlx5_clock_get_ptp_index()
/Linux-v5.15/include/linux/fsl/
Dptp_qoriq.h1 // SPDX-License-Identifier: GPL-2.0
14 * qoriq ptp registers
17 u32 tmr_ctrl; /* Timer control register */
19 u32 tmr_temask; /* Timer event mask register */
21 u32 tmr_pemask; /* Timer event mask register */
23 u32 tmr_cnt_h; /* Timer counter high register */
24 u32 tmr_cnt_l; /* Timer counter low register */
25 u32 tmr_add; /* Timer drift compensation addend register */
26 u32 tmr_acc; /* Timer accumulator register */
27 u32 tmr_prsc; /* Timer prescale */
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/Linux-v5.15/Documentation/devicetree/bindings/ptp/
Dptp-qoriq.txt1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
11 have as many as four PTP related interrupts.
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
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/Linux-v5.15/drivers/net/ethernet/freescale/
Dfec_ptp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Fast Ethernet Controller (ENET) PTP driver for MX6x.
96 * This function enble the PPS ouput on the timer channel.
106 if (fep->pps_enable == enable) in fec_ptp_enable_pps()
109 fep->pps_channel = DEFAULT_PPS_CHANNEL; in fec_ptp_enable_pps()
110 fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; in fec_ptp_enable_pps()
112 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
117 writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
123 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
126 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
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/Linux-v5.15/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_ptp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 PTP Header file
18 /* IEEE 1588 PTP register offsets */
20 #define PTP_SSIR 0x04 /* Sub-Second Increment Reg */
27 #define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
28 #define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
31 #define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
34 /* PTP Timestamp control register defines */
43 /* Enable PTP packet Processing for Version 2 Format */
45 /* Enable Processing of PTP over Ethernet Frames */
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/Linux-v5.15/drivers/net/ethernet/intel/ice/
Dice_ptp_hw.c1 // SPDX-License-Identifier: GPL-2.0
13 * +---------------+ +---------------+ +---------------+
15 * +---------------+ +---------------+ +---------------+
21 * +---------------+ +---------------+
23 * +---------------+ +---------------+
33 * outgoing packets on request. To support this, the PHY maintains a timer
34 * that matches the lower 64 bits of the global source timer.
36 * In order to ensure that the PHY timers and the source timer are equivalent,
43 * ice_get_ptp_src_clock_index - determine source clock index
51 return hw->func_caps.ts_func_info.tmr_index_assoc; in ice_get_ptp_src_clock_index()
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Dice_ptp.c1 // SPDX-License-Identifier: GPL-2.0
10 * ice_set_tx_tstamp - Enable or disable Tx timestamping
26 if (!vsi->tx_rings[i]) in ice_set_tx_tstamp()
28 vsi->tx_rings[i]->ptp_tx = on; in ice_set_tx_tstamp()
32 val = rd32(&pf->hw, PFINT_OICR_ENA); in ice_set_tx_tstamp()
37 wr32(&pf->hw, PFINT_OICR_ENA, val); in ice_set_tx_tstamp()
41 * ice_set_rx_tstamp - Enable or disable Rx timestamping
56 if (!vsi->rx_rings[i]) in ice_set_rx_tstamp()
58 vsi->rx_rings[i]->ptp_rx = on; in ice_set_rx_tstamp()
63 * ice_ptp_cfg_timestamp - Configure timestamp for init/deinit
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/Linux-v5.15/drivers/ptp/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PTP clock support configuration
6 menu "PTP clock support"
9 tristate "PTP clock support"
17 standard defines a Precision Time Protocol (PTP), which can
23 This driver adds support for PTP clocks as character
24 devices. If you want to use a PTP clock, then you should
28 will be called ptp.
37 into vmlinux while the PTP support itself is in a loadable
39 If PTP support is disabled, this dependency will still be
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Dptp_qoriq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
26 /* Caller must hold ptp_qoriq->lock. */
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; in tmr_cnt_read()
33 lo = ptp_qoriq->read(&regs->ctrl_regs->tmr_cnt_l); in tmr_cnt_read()
34 hi = ptp_qoriq->read(&regs->ctrl_regs->tmr_cnt_h); in tmr_cnt_read()
40 /* Caller must hold ptp_qoriq->lock. */
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; in tmr_cnt_write()
47 ptp_qoriq->write(&regs->ctrl_regs->tmr_cnt_l, lo); in tmr_cnt_write()
48 ptp_qoriq->write(&regs->ctrl_regs->tmr_cnt_h, hi); in tmr_cnt_write()
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Dptp_dte.c50 /* ptp dte priv structure */
101 ns = dte_read_nco(ptp_dte->regs); in dte_write_nco_delta()
105 if (ptp_dte->ts_wrap_cnt) { in dte_write_nco_delta()
107 ptp_dte->ts_wrap_cnt--; in dte_write_nco_delta()
114 ptp_dte->ts_wrap_cnt++; in dte_write_nco_delta()
115 ns -= DTE_NCO_MAX_NS; in dte_write_nco_delta()
119 dte_write_nco(ptp_dte->regs, ns); in dte_write_nco_delta()
121 ptp_dte->ts_ovf_last = (ns >> DTE_NCO_TS_WRAP_LSHIFT) & in dte_write_nco_delta()
130 ns = dte_read_nco(ptp_dte->regs); in dte_read_nco_with_ovf()
136 if (ts_ovf < ptp_dte->ts_ovf_last) in dte_read_nco_with_ovf()
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Dptp_pch.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PTP 1588 clock using the EG20T PCH
6 * Copyright (C) 2011-2012 LAPIS SEMICONDUCTOR Co., LTD.
42 * struct pch_ts_regs - IEEE 1588 registers
109 * struct pch_dev - Driver private data
126 * struct pch_params - 1588 module parameter
144 val = ioread32(&chip->regs->ts_sel) | (PCH_ECS_ETH); in pch_eth_enable_set()
145 iowrite32(val, (&chip->regs->ts_sel)); in pch_eth_enable_set()
153 lo = ioread32(&regs->systime_lo); in pch_systime_read()
154 hi = ioread32(&regs->systime_hi); in pch_systime_read()
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/Linux-v5.15/drivers/net/ethernet/mellanox/mlx4/
Den_clock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
39 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
45 struct mlx4_dev *dev = mdev->dev; in mlx4_en_read_clock()
47 return mlx4_read_clock(dev) & tc->mask; in mlx4_en_read_clock()
55 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo); in mlx4_en_get_cqe_ts()
56 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16; in mlx4_en_get_cqe_ts()
69 seq = read_seqbegin(&mdev->clock_lock); in mlx4_en_fill_hwtstamps()
70 nsec = timecounter_cyc2time(&mdev->clock, timestamp); in mlx4_en_fill_hwtstamps()
71 } while (read_seqretry(&mdev->clock_lock, seq)); in mlx4_en_fill_hwtstamps()
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/Linux-v5.15/drivers/net/ethernet/xscale/
Dptp_ixp46x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock using the IXP46X
19 #include <mach/ixp4xx-regs.h>
47 lo = __raw_readl(&regs->systime_lo); in ixp_systime_read()
48 hi = __raw_readl(&regs->systime_hi); in ixp_systime_read()
65 __raw_writel(lo, &regs->systime_lo); in ixp_systime_write()
66 __raw_writel(hi, &regs->systime_hi); in ixp_systime_write()
76 struct ixp46x_ts_regs *regs = ixp_clock->regs; in isr()
80 val = __raw_readl(&regs->event); in isr()
84 if (ixp_clock->exts0_enabled) { in isr()
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/Linux-v5.15/drivers/net/ethernet/cadence/
Dmacb_ptp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * 1588 PTP support for Cadence GEM device.
5 * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com
26 #define GEM_PTP_TIMER_NAME "gem-ptp-timer"
31 if (bp->hw_dma_cap == HW_DMA_CAP_PTP) in macb_ptp_desc()
34 if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) in macb_ptp_desc()
41 static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts) in gem_tsu_get_time() argument
43 struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); in gem_tsu_get_time()
48 spin_lock_irqsave(&bp->tsu_clk_lock, flags); in gem_tsu_get_time()
56 /* if so, use later read & re-read seconds in gem_tsu_get_time()
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Dmacb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
97 #define GEM_EFTSH 0x00e8 /* PTP Event Frame Transmitted Seconds Register 47:32 */
98 #define GEM_EFRSH 0x00ec /* PTP Event Frame Received Seconds Register 47:32 */
99 #define GEM_PEFTSH 0x00f0 /* PTP Peer Event Frame Transmitted Seconds Register 47:32 */
100 #define GEM_PEFRSH 0x00f4 /* PTP Peer Event Frame Received Seconds Register 47:32 */
109 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
110 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
111 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
112 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
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/Linux-v5.15/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_ptp.c2 * cxgb4_ptp.c:Chelsio PTP support for T5/T6
4 * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
54 * cxgb4_ptp_is_ptp_tx - determine whether TX packet is PTP or not
55 * @skb: skb of outgoing ptp request
63 return skb->len >= PTP_MIN_LENGTH && in cxgb4_ptp_is_ptp_tx()
64 skb->len <= PTP_IN_TRANSMIT_PACKET_MAXNUM && in cxgb4_ptp_is_ptp_tx()
65 likely(skb->protocol == htons(ETH_P_IP)) && in cxgb4_ptp_is_ptp_tx()
66 ip_hdr(skb)->protocol == IPPROTO_UDP && in cxgb4_ptp_is_ptp_tx()
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/Linux-v5.15/drivers/net/ethernet/intel/e1000e/
Dptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* PTP 1588 Hardware Clock (PHC)
5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
18 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
19 * @ptp: ptp clock structure
25 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) in e1000e_phc_adjfreq() argument
27 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, in e1000e_phc_adjfreq()
29 struct e1000_hw *hw = &adapter->hw; in e1000e_phc_adjfreq()
36 if ((delta > ptp->max_adj) || (delta <= -1000000000)) in e1000e_phc_adjfreq()
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/igc/
Digc_ptp.c1 // SPDX-License-Identifier: GPL-2.0
27 struct igc_hw *hw = &adapter->hw; in igc_ptp_read()
34 ts->tv_sec = sec; in igc_ptp_read()
35 ts->tv_nsec = nsec; in igc_ptp_read()
41 struct igc_hw *hw = &adapter->hw; in igc_ptp_write_i225()
43 wr32(IGC_SYSTIML, ts->tv_nsec); in igc_ptp_write_i225()
44 wr32(IGC_SYSTIMH, ts->tv_sec); in igc_ptp_write_i225()
47 static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm) in igc_ptp_adjfine_i225() argument
49 struct igc_adapter *igc = container_of(ptp, struct igc_adapter, in igc_ptp_adjfine_i225()
51 struct igc_hw *hw = &igc->hw; in igc_ptp_adjfine_i225()
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/Linux-v5.15/drivers/net/ethernet/freescale/enetc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
15 If compiled as module (M), the module name is fsl-enetc.
27 If compiled as module (M), the module name is fsl-enetc-vf.
35 If compiled as module (M), the module name is fsl-enetc-ierb.
44 If compiled as module (M), the module name is fsl-enetc-mdio.
47 tristate "ENETC PTP clock driver"
51 This driver adds support for using the ENETC 1588 timer
52 as a PTP clock. This clock is only useful if your PTP
53 programs are getting hardware time stamps on the PTP Ethernet
56 If compiled as module (M), the module name is fsl-enetc-ptp.
[all …]
/Linux-v5.15/drivers/net/ethernet/freescale/dpaa2/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 Enable Priority-Based Flow Control (PFC) support for DPAA2 Ethernet
26 tristate "Freescale DPAA2 PTP Clock"
30 This driver adds support for using the DPAA2 1588 timer module
31 as a PTP clock.
/Linux-v5.15/drivers/net/ethernet/renesas/
Dravb_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* PTP 1588 clock using the Renesas Ethernet AVB
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
13 struct net_device *ndev = priv->ndev; in ravb_ptp_tcr_request()
27 struct net_device *ndev = priv->ndev; in ravb_ptp_time_read()
34 ts->tv_nsec = ravb_read(ndev, GCT0); in ravb_ptp_time_read()
35 ts->tv_sec = ravb_read(ndev, GCT1) | in ravb_ptp_time_read()
45 struct net_device *ndev = priv->ndev; in ravb_ptp_time_write()
55 return -EBUSY; in ravb_ptp_time_write()
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/Linux-v5.15/arch/arm64/boot/dts/freescale/
Dqoriq-fman3-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 cell-index = <0>;
21 clock-names = "fmanclk";
22 fsl,qman-channel-range = <0x800 0x10>;
23 ptimer-handle = <&ptp_timer0>;
24 dma-coherent;
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