Searched full:prescaled (Results 1 – 10 of 10) sorted by relevance
119 unsigned long long prescaled = ((unsigned long long)parent_rate) * MULTIPLIER; in msc313_cpupll_frequencyforreg() local121 if (prescaled == 0 || reg == 0) in msc313_cpupll_frequencyforreg()123 return DIV_ROUND_DOWN_ULL(prescaled, reg); in msc313_cpupll_frequencyforreg()128 unsigned long long prescaled = ((unsigned long long)parent_rate) * MULTIPLIER; in msc313_cpupll_regforfrequecy() local130 if (prescaled == 0 || rate == 0) in msc313_cpupll_regforfrequecy()132 return DIV_ROUND_UP_ULL(prescaled, rate); in msc313_cpupll_regforfrequecy()
14 prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The
15 free-running mode. The input clock is shared, but can be gated and prescaled
131 * integer pointed to by the m argument should be prescaled by135 * target_rate) given the current (parent_rate, n, prescaled m)
105 cycles >>= 12; // Prescaled by 4096 in berlin_pwm_config()
140 * Calculate the duty cycle in multiples of the prescaled period: in mchp_core_pwm_calc_duty()
447 * is prescaled by 32 using the interval interrupt. Leave it in ttc_setup_clockevent()
380 * and certain PCLK (prescaled MCLK) values. in max9867_dai_hw_params()
385 /* TRM for 5912 says the I2C clock must be prescaled to be in omap_i2c_init()
67 * support prescaled 100khz clock for slow pacing (not available on 600083 * 100kHz 'prescaled' clock for slow acquisition,
