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/Linux-v6.1/Documentation/devicetree/bindings/hwmon/
Dmoortec,mr75203.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
19 *) Temperature Sensor (TS) - used to monitor core temperature (e.g. mr74137).
20 *) Voltage Monitor (VM) - used to monitor voltage levels (e.g. mr74138).
21 *) Process Detector (PD) - used to assess silicon speed (e.g. mr74139).
22 *) Delay Chain - ring oscillator connected to the PD, used to measure IO
25 *) Pre Scaler - provides divide-by-X scaling of input voltage, which can then
26 be presented for VM for measurement within its range (e.g. mr76006 -
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/Linux-v6.1/drivers/media/platform/samsung/exynos-gsc/
Dgsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
65 /* G-Scaler source image size */
70 /* G-Scaler source image offset */
75 /* G-Scaler cropped source image size */
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Dgsc-core.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
20 #include <media/videobuf2-v4l2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-mediabus.h>
25 #include <media/videobuf2-dma-contig.h>
27 #include "gsc-regs.h"
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/Linux-v6.1/drivers/gpu/drm/exynos/
Dregs-gsc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* linux/drivers/gpu/drm/exynos/regs-gsc.h
7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
45 /* G-Scaler input control */
91 /* G-Scaler source image size */
98 /* G-Scaler source image offset */
105 /* G-Scaler cropped source image size */
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Dregs-fimc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* drivers/gpu/drm/exynos/regs-fimc.h
52 /* Pre-scaler control 1 */
54 /* Pre-scaler control 2 */
56 /* Main scaler control */
300 (EXYNOS_CIOYSA5 + ((__x) - DEF_PP) * 4))
304 (EXYNOS_CIOCBSA5 + ((__x) - DEF_PP) * 4))
308 (EXYNOS_CIOCRSA5 + ((__x) - DEF_PP) * 4))
506 /* Main scaler control register */
Dexynos_drm_gsc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #include "regs-gsc.h"
28 * GSC stands for General SCaler and
29 * supports image scaler/rotator and input/output DMA operations.
64 #define gsc_read(offset) readl(ctx->regs + (offset))
65 #define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
68 * A structure of scaler.
71 * @pre_shfactor: pre sclaer shift factor.
74 * @main_hratio: the main scaler's horizontal ratio.
75 * @main_vratio: the main scaler's vertical ratio.
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/Linux-v6.1/drivers/gpu/drm/i915/display/
Dskl_scaler.c1 // SPDX-License-Identifier: MIT
14 * -0.5. That matches how the hardware calculates the scaling
15 * factors (from top-left of the first pixel to bottom-right
26 * The same behaviour is observed on pre-SKL platforms as well.
28 * Theory behind the formula (note that we ignore sub-pixel
34 * -0.5
43 * -0.5
44 * | -0.375 (initial phase)
53 int phase = -0x8000; in skl_scaler_calc_phase()
57 phase += (sub - 1) * 0x8000 / sub; in skl_scaler_calc_phase()
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Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
47 #include <media/cec-notifier.h>
67 /* these are outputs from the chip - integrated only
85 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
101 * create the DMA scatter-gather list for each FB color plane. This sg
113 * in the rotated and remapped GTT view all no-CCS formats (up to 2
210 * state. This must be called _after_ display->get_pipe_config has
211 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
407 * and the bus-specific code. What that means is that HDCP over HDMI differs
412 * - DP AUX vs. DDC
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/Linux-v6.1/drivers/gpu/drm/meson/
Dmeson_vpp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * - Postblend, Blends the OSD1 only
23 * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and
25 * - Intermediate FIFO with default Amlogic values
29 * - Preblend for video overlay pre-scaling
30 * - OSD2 support for cursor framebuffer
31 * - Video pre-scaling before postblend
32 * - Full Vertical/Horizontal OSD scaling to support TV overscan
33 * - HDR conversion
38 writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); in meson_vpp_setup_mux()
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/Linux-v6.1/drivers/hwmon/
Dmr75203.c1 // SPDX-License-Identifier: GPL-2.0
110 #define PVT_TEMP_MIN_mC -40000
116 #define PVT_SERIES5_J_CONST -100
132 * struct voltage_device - VM single input parameters.
135 * @pre_scaler: Pre scaler value (1 or 2) used to normalize the voltage output
138 * The structure provides mapping between channel-number (0..N-1) to VM-index
139 * (0..num_vm-1) and channel-index (0..ch_num-1) where N = num_vm * ch_num.
149 * struct voltage_channels - VM channel count.
187 struct pvt_device *pvt = file->private_data; in pvt_ts_coeff_j_read()
191 len = scnprintf(buf, sizeof(buf), "%d\n", pvt->ts_coeff.j); in pvt_ts_coeff_j_read()
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/Linux-v6.1/drivers/media/platform/samsung/s3c-camif/
Dcamif-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include "camif-core.h"
15 #include <media/drv-intf/s3c_camif.h>
19 * id = 0 - codec (FIMC C), 1 - preview (FIMC P).
65 #define CIGCTRL_IRQ_CLR(id) BIT(19 - (id))
77 /* CICOTRGFMT, CIPRTRGFMT - Target format */
100 /* xBURSTn - 5-bits width */
110 /* CICOSCPRERATIO, CIPRSCPRERATIO. Pre-scaler control 1. */
113 /* CICOSCPREDST, CIPRSCPREDST. Pre-scaler control 2. */
116 /* CICOSCCTRL, CIPRSCCTRL. Main scaler control. */
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/Linux-v6.1/include/linux/platform_data/
Dkeypad-ep93xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define EP93XX_KEYPAD_DISABLE_3_KEY (1<<0) /* disable 3-key reset */
15 * struct ep93xx_keypad_platform_data - platform specific device structure
18 * @prescale: row/column counter pre-scaler load value
/Linux-v6.1/drivers/watchdog/
Dlpc18xx_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * -----
9 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit
35 /* Clock pre-scaler */
70 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
71 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
72 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
73 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
81 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev; in lpc18xx_wdt_timer_feed()
86 mod_timer(&lpc18xx_wdt->timer, jiffies + in lpc18xx_wdt_timer_feed()
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/Linux-v6.1/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/Linux-v6.1/drivers/gpu/drm/nouveau/
Dnouveau_connector.h103 } scaler; member
113 bool scaler:1; member
145 * even on pre-nv50 where we do not support atomic. This embedded
163 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in nouveau_connector_is_mst()
170 encoder = &nv_encoder->base.base; in nouveau_connector_is_mst()
171 return encoder->encoder_type == DRM_MODE_ENCODER_DPMST; in nouveau_connector_is_mst()
181 struct drm_device *dev = nv_crtc->base.dev; in nouveau_crtc_connector_get()
189 if (connector->encoder && connector->encoder->crtc == crtc) { in nouveau_crtc_connector_get()
/Linux-v6.1/drivers/clocksource/
Dtimer-cadence-ttc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2013 Xilinx
22 * This driver configures the 2 16/32-bit count-up timers as follows:
29 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
33 * obtained from device tree. The pre-scaler of 32 is used.
54 * Setup the timers to use pre-scaling, using a fixed value for now that will
59 #define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1)
66 * struct ttc_timer - This definition defines local timer structure
104 * ttc_set_interval - Set the timer interval value
114 /* Disable the counter, set the counter value and re-enable counter */ in ttc_set_interval()
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Dtimer-keystone.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Keystone broadcast clock-event
17 #define TIMER_NAME "timer-keystone"
121 evt->event_handler(evt); in keystone_timer_interrupt()
153 return -EINVAL; in keystone_timer_init()
159 return -ENXIO; in keystone_timer_init()
182 /* reset timer as 64-bit, no pre-scaler, plus features are disabled */ in keystone_timer_init()
205 event_dev->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; in keystone_timer_init()
206 event_dev->set_next_event = keystone_set_next_event; in keystone_timer_init()
207 event_dev->set_state_shutdown = keystone_shutdown; in keystone_timer_init()
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/Linux-v6.1/Documentation/admin-guide/media/
Dipu3.rst1 .. SPDX-License-Identifier: GPL-2.0
24 ImgU). The CIO2 driver is available as drivers/media/pci/intel/ipu3/ipu3-cio2*
36 Both of the drivers implement V4L2, Media Controller and V4L2 sub-device
38 MIPI CSI-2 interfaces through V4L2 sub-device sensor drivers.
44 interface to the user space. There is a video node for each CSI-2 receiver,
47 The CIO2 contains four independent capture channel, each with its own MIPI CSI-2
48 receiver and DMA engine. Each channel is modelled as a V4L2 sub-device exposed
49 to userspace as a V4L2 sub-device node and has two pads:
53 .. flat-table::
54 :header-rows: 1
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/Linux-v6.1/drivers/staging/media/atomisp/pci/camera/pipe/interface/
Dia_css_pipe_binarydesc.h1 /* SPDX-License-Identifier: GPL-2.0 */
109 /* @brief Get a binary descriptor for yuv scaler stage.
162 /* @brief Get a binary descriptor for pre gdc stage.
224 /* @brief Get a binary descriptor for pre anr stage.
/Linux-v6.1/drivers/media/platform/samsung/exynos4-is/
Dfimc-reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
13 #include "fimc-core.h"
54 /* 0 - selects Writeback A (LCD), 1 - selects Writeback B (LCD/ISP) */
59 /* 0 - ITU601; 1 - ITU709 */
114 /* Pre-scaler control 1 */
119 /* Main scaler control */
275 #define FIMC_REG_CSIIMGFMT_USER(x) (0x30 + x - 1)
326 * fimc_hw_set_dma_seq - configure output DMA buffer sequence
335 writel(mask, dev->regs + FIMC_REG_CIFCNTSEQ); in fimc_hw_set_dma_seq()
/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
99 * SSPP sub-blocks/features
105 * @DPU_SSPP_SCALER_RGB, RGB Scaler, supported by RGB pipes
107 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
110 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
143 * MIXER sub-blocks/features
145 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
161 * DSPP sub-blocks
172 * PINGPONG sub-blocks
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/Linux-v6.1/drivers/gpu/drm/
Ddrm_blend.c43 * sub-pixel accuracy, which is scaled up to a pixel-aligned destination
96 * plane-wide opacity, from transparent (0) to opaque (0xffff). It can be
99 * pre-multiplied by the global alpha associated to the plane.
109 * "rotate-<degrees>":
113 * "reflect-<axis>":
117 * reflect-x::
120 * | | -> | |
123 * reflect-y::
126 * | | -> | |
137 * value can also be immutable, to inform userspace about the hard-coded
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/Linux-v6.1/drivers/gpu/drm/amd/display/modules/color/
Dcolor_gamma.c48 * X[i] = 2 * X[i-NUM_PTS_IN_REGION] for i>=16
66 /* one-time setup of X points */
78 for (segment = 6; segment > (6 - NUM_REGIONS); segment--) { in setup_x_points_distribution()
82 seg_offset = (segment + (NUM_REGIONS - 7)) * NUM_PTS_IN_REGION; in setup_x_points_distribution()
89 (coordinates_x[index-1].x, increment); in setup_x_points_distribution()
174 /* de gamma, non-linear to linear */
206 /* re gamma, linear to non-linear */
238 /* one-time pre-compute PQ values - only for sdr_white_level 80 */
254 x = dc_fixpt_mul(coord_x->x, scaling_factor); in precompute_pq()
260 /* one-time pre-compute dePQ values - only for max pixel value 125 FP16 */
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/Linux-v6.1/drivers/clk/bcm/
Dclk-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0+
27 #include <linux/clk-provider.h>
38 #include <dt-bindings/clock/bcm2835.h>
45 # define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
253 # define A2W_PLL_FRAC_MASK ((1 << A2W_PLL_FRAC_BITS) - 1)
337 writel(CM_PASSWORD | val, cprman->regs + reg); in cprman_write()
342 return readl(cprman->regs + reg); in cprman_read()
355 spin_lock(&cprman->regs_lock); in bcm2835_measure_tcnt_mux()
372 dev_err(cprman->dev, "timeout waiting for OSCCOUNT\n"); in bcm2835_measure_tcnt_mux()
383 dev_err(cprman->dev, "timeout waiting for !BUSY\n"); in bcm2835_measure_tcnt_mux()
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/Linux-v6.1/drivers/spi/
Dspi-ppc4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
39 #include <asm/dcr-regs.h>
41 /* bits in mode register - bit 0 is MSb */
54 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
55 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode
103 * CDM = (OPBCLK/4*SCPClkOut) - 1
143 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", in spi_ppc4xx_txrx()
144 t->tx_buf, t->rx_buf, t->len); in spi_ppc4xx_txrx()
146 hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_txrx()
148 hw->tx = t->tx_buf; in spi_ppc4xx_txrx()
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