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/Linux-v5.15/drivers/cpuidle/
Dcpuidle-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <asm/pm-cps.h>
17 STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
18 STATE_CLOCK_GATED, /* Core clock gated */
19 STATE_POWER_GATED, /* Core power gated */
36 if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT)) in cps_nc_enter()
52 return -EINVAL; in cps_nc_enter()
55 /* Notify listeners the CPU is about to power down */ in cps_nc_enter()
57 return -EINTR; in cps_nc_enter()
78 .name = "nc-wait",
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/Linux-v5.15/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary()
58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary()
80 * The power up sequence of cold boot CPU and warm boot CPU in tegra30_boot_secondary()
84 * power will be resumed automatically after un-halting the in tegra30_boot_secondary()
103 * The power status of the cold boot CPU is power gated as in tegra30_boot_secondary()
104 * default. To power up the cold boot CPU, the power should in tegra30_boot_secondary()
105 * be un-gated by un-toggling the power gate register in tegra30_boot_secondary()
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Dsleep-tegra30.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/asm-offsets.h>
37 #define PMC_CTRL_SIDE_EFFECT_LP0 (1 << 14) /* enter LP0 when CPU pwr gated */
190 * Puts the current CPU in wait-for-event mode on the flow controller
191 * and powergates it -- flags (in R0) indicate the request type.
194 * corrupts r0-r4, r10-r12
213 * Clear this CPU's "event" and "interrupt" flags and power gate
258 wfeeq @ CPU should be power gated here
291 * CPU power-gating process, to avoid loading from SDRAM which
292 * are not supported once SDRAM is put into self-refresh.
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/Linux-v5.15/arch/mips/include/asm/
Dpm-cps.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * The CM & CPC can only handle coherence & power control on a per-core basis,
25 CPS_PM_NC_WAIT, /* MIPS wait instruction, non-coherent */
26 CPS_PM_CLOCK_GATED, /* Core clock gated */
27 CPS_PM_POWER_GATED, /* Core power gated */
32 * cps_pm_support_state - determine whether the system supports a PM state
40 * cps_pm_enter_state - enter a PM state
43 * Enter the given PM state. If coupled_coherence is non-zero then it is
45 * each coupled CPU. Returns 0 on successful entry & exit, otherwise -errno.
/Linux-v5.15/Documentation/devicetree/bindings/arm/msm/
Dqcom,idle-state.txt3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
10 * Standalone Power Collapse (Standalone PC or SPC)
11 * Power Collapse (PC)
26 Retention: Retention is a low power state where the core is clock gated and
33 Standalone PC: A cpu can power down and warmboot if there is a sufficient time
35 to indicate a core entering a power down state without consulting any other
36 cpu or the system resources. This helps save power only on that core. The SPM
37 sequence for this idle state is programmed to power down the supply to the
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/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
21 between gated clocks and other clocks and an index specifying the clock to
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Dmvebu-gated-clock.txt1 * Gated Clock bindings for Marvell EBU SoCs
4 peripheral clocks to be gated to save some power. The clock consumer
12 -----------------------------------
29 -----------------------------------
56 -----------------------------------
83 -----------------------------------
97 -----------------------------------
124 -----------------------------------
134 -----------------------------------
157 -----------------------------------
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/Linux-v5.15/drivers/staging/media/atomisp/pci/
Datomisp-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
56 * Enables the combining of adjacent 32-byte read requests to the same
57 * cache line. When cleared, each 32-byte read request is sent as a
64 * If cleared, the high speed clock going to the digital logic is gated when
65 * RCOMP update is happening. The clock is gated for a minimum of 100 nsec.
66 * If this bit is set, then the high speed clock is not gated during the
72 * Enables the combining of adjacent 32-byte write requests to the same
73 * cache line. When cleared, each 32-byte write request is sent as a
102 /* MRFLD ISP POWER related */
/Linux-v5.15/drivers/mmc/host/
Dtoshsd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #define SD_PCICFG_GATEDCLK 0x41 /* Gated clock */
22 #define SD_PCICFG_EXTGATECLK1 0xf0 /* Could be used for gated clock */
23 #define SD_PCICFG_EXTGATECLK2 0xf1 /* Could be used for gated clock */
34 #define SD_PCICFG_PWR1_OFF 0x00 /* Turn off power */
/Linux-v5.15/arch/arm/mach-omap2/
Dclkt2xxx_dpll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2-specific DPLL control functions
16 #include "cm-regbits-24xx.h"
21 * _allow_idle - enable DPLL autoidle bits
24 * Enable DPLL automatic idle control. The DPLL will enter low-power
25 * stop when its downstream clocks are gated. No return value.
26 * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1
31 if (!clk || !clk->dpll_data) in _allow_idle()
38 * _deny_idle - prevent DPLL from automatically idling
45 if (!clk || !clk->dpll_data) in _deny_idle()
/Linux-v5.15/drivers/staging/rtl8723bs/include/
Dhal_pwr_seq.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd
9 There are 6 HW Power States:
10 0: POFF--Power Off
11 1: PDN--Power Down
12 2: CARDEMU--Card Emulation
13 3: ACT--Active Mode
14 4: LPS--Low Power State
15 5: SUS--Suspend
50 …LL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
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/Linux-v5.15/arch/arm/mach-s3c/
Dcpuidle-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "regs-sys-s3c64xx.h"
20 #include "regs-syscon-power-s3c64xx.h"
48 .desc = "System active, ARM gated",
/Linux-v5.15/arch/arm/include/asm/
Dmcpm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright: (C) 2012-2013 Linaro Limited
40 * branch once it is ready to re-enter the kernel using ptr, or NULL if it
41 * should be gated. A gated CPU is held in a WFE loop until its vector
55 * CPU/cluster power operations API for higher subsystems to use.
59 * mcpm_is_available - returns whether MCPM is initialized and available
66 * mcpm_cpu_power_up - make given CPU in given cluster runable
87 * mcpm_cpu_power_down - power the calling CPU down
92 * then the cluster is prepared for power-down too.
96 * On success this does not return. Re-entry in the kernel is expected
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/Linux-v5.15/include/linux/pinctrl/
Dpinctrl-state.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * but not fully sleeping - some power may be on but clocks gated for
/Linux-v5.15/Documentation/arm/sunxi/
Dclocks.rst11 A: The 24MHz oscillator allows gating to save power. Indeed, if gated
49 A: The linux-sunxi wiki contains a page documenting the clock registers,
52 http://linux-sunxi.org/A10/CCM
57 https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu
/Linux-v5.15/arch/arm/mach-lpc32xx/
Dpm.c2 * arch/arm/mach-lpc32xx/pm.c
14 * LPC32XX CPU and system power management
16 * The LPC32XX has three CPU modes for controlling system power: run,
17 * direct-run, and halt modes. When switching between halt and run modes,
18 * the CPU transistions through direct-run mode. For Linux, direct-run
27 * Direct-run mode:
34 * SYSCLK is gated off and the CPU and system clocks are halted.
38 * wake the system up back into direct-run mode.
43 * SDRAM will still be accessible in direct-run mode. In DDR based systems,
44 * a transition to direct-run mode will stop all DDR accesses (no clocks).
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/Linux-v5.15/arch/arm/boot/dts/
Drk3288-veyron-brain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-brain-rev0", "google,veyron-brain",
17 vcc33_sys: vcc33-sys {
18 vin-supply = <&vcc_5v>;
22 compatible = "regulator-fixed";
23 regulator-name = "vcc33_io";
24 regulator-always-on;
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Dimx6qdl-sr-som-ti.dtsi4 * This file is dual-licensed: you can use it either under the terms
41 #include <dt-bindings/gpio/gpio.h>
44 nvcc_sd1: regulator-nvcc-sd1 {
45 compatible = "regulator-fixed";
46 regulator-always-on;
47 regulator-name = "nvcc_sd1";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 vin-supply = <&vcc_3v3>;
53 clk_ti_wifi: ti-wifi-clock {
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/Linux-v5.15/drivers/soc/samsung/
Dexynos5420-pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
6 // Exynos5420 - CPU PMU (Power Management Unit) support
9 #include <linux/soc/samsung/exynos-regs-pmu.h>
10 #include <linux/soc/samsung/exynos-pmu.h>
14 #include "exynos-pmu.h"
219 * for local power blocks to Low initially as per Table 8-4: in exynos5420_pmu_init()
220 * "System-Level Power-Down Configuration Registers". in exynos5420_pmu_init()
238 * bridge are gated. Thus, when ISP power is gated, LPI in exynos5420_pmu_init()
/Linux-v5.15/Documentation/driver-api/gpio/
Ddrivers-on-gpio.rst6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
32 - extcon-gpio: drivers/extcon/extcon-gpio.c is used when you need to read an
36 - restart-gpio: drivers/power/reset/gpio-restart.c is used to restart/reboot
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/Linux-v5.15/include/sound/
Dsoc-dai.h1 /* SPDX-License-Identifier: GPL-2.0
3 * linux/sound/soc-dai.h -- ALSA SoC Layer
5 * Copyright: 2005-2008 Wolfson Microelectronics. PLC.
58 * DAI bit clocks can be gated (disabled) when the DAI is not
59 * sending or receiving PCM data in a frame. This can be used to save power.
62 #define SND_SOC_DAIFMT_GATED (0 << 4) /* clock is gated */
66 * define GATED -> CONT. GATED will be selected if both are selected.
82 * - "normal" polarity means signal is available at rising edge of BCLK
83 * - "inverted" polarity means signal is available at falling edge of BCLK
86 * - I2S: frame consists of left then right channel data. Left channel starts
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/Linux-v5.15/Documentation/arm/samsung/
Dbootloader-interface.rst14 In the document "boot loader" means any of following: U-boot, proprietary
19 1. Non-Secure mode
65 3. Other (regardless of secure/non-secure mode)
72 0x0908 Non-zero Secondary CPU boot up indicator
79 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other
80 modules are power gated, except the TOP modules
81 MCPM - Multi-Cluster Power Management
/Linux-v5.15/drivers/misc/mei/
Dmei_dev.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2003-2019, Intel Corporation. All rights reserved.
39 #define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1)
74 * enum mei_cb_file_ops - file operation associated with the callback
98 * enum mei_cl_io_mode - io mode between driver and fw
103 * @MEI_CL_IO_RX_NONBLOCK: recv is non-blocking
128 * struct mei_dma_dscr - dma address descriptor
147 * struct mei_fw_status - storage of FW status data
158 * struct mei_me_client - representation of me (fw) client
182 * struct mei_cl_cb - file operation callback structure
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/Linux-v5.15/drivers/usb/chipidea/
Dci_hdrc_tegra.c1 // SPDX-License-Identifier: GPL-2.0
73 .compatible = "nvidia,tegra20-ehci",
76 .compatible = "nvidia,tegra30-ehci",
79 .compatible = "nvidia,tegra20-udc",
82 .compatible = "nvidia,tegra30-udc",
85 .compatible = "nvidia,tegra114-udc",
88 .compatible = "nvidia,tegra124-udc",
108 phy_np = of_parse_phandle(dev->of_node, "nvidia,phy", 0); in tegra_usb_reset_controller()
110 return -ENOENT; in tegra_usb_reset_controller()
117 rst_utmi = of_reset_control_get_shared(phy_np, "utmi-pads"); in tegra_usb_reset_controller()
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/Linux-v5.15/Documentation/devicetree/bindings/devfreq/
Drk3399_dmc.txt4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
15 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
19 - interrupts: The CPU interrupt number. The interrupt specifier
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