Searched +full:power +full:- +full:domains (Results 1 – 25 of 415) sorted by relevance
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| /Linux-v5.4/Documentation/devicetree/bindings/power/ |
| D | power_domain.txt | 1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
4 used for power gating of selected IP blocks for power saving by reduced leakage
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
17 - #power-domain-cells : Number of cells in a PM domain specifier;
19 providing multiple PM domains (e.g. power controllers), but can be any value
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
24 the power controller specified by phandle.
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| D | pd-samsung.txt | 1 * Samsung Exynos Power Domains
3 Exynos processors include support for multiple power domains which are used
4 to gate power to one or more peripherals on the processor.
7 - compatible: should be one of the following.
8 * samsung,exynos4210-pd - for exynos4210 type power domain.
9 * samsung,exynos5433-pd - for exynos5433 type power domain.
10 - reg: physical base address of the controller and length of memory mapped
12 - #power-domain-cells: number of cells in power domain specifier;
16 - label: Human readable string with domain name. Will be visible in userspace
17 to let user to distinguish between multiple domains in SoC.
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| /Linux-v5.4/arch/arm64/boot/dts/renesas/ |
| D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
28 /* External CAN clock - to be overridden by boards that provide it */
30 compatible = "fixed-clock";
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| D | r8a77995.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 /* External CAN clock - to be overridden by boards that provide it */
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
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| D | r8a77970.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
27 /* External CAN clock - to be overridden by boards that provide it */
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| D | r8a7795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77950) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
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| D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a774c0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <0>;
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| D | r8a7796.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
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| D | r8a77990.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
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| D | r8a77965.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
19 #address-cells = <2>;
20 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
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| D | r8a774a1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <0>;
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | r8a7792.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
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| D | r8a77470.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "renesas,apmu";
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| D | mt7623a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/power/mt7623a-power.h>
13 power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
17 power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
21 power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
25 power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
29 power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
33 compatible = "mediatek,mt7623a-scpsys";
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| D | r7s9210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
23 clock-frequency = <0>;
27 #clock-cells = <0>;
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| D | r8a7740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC
8 #include <dt-bindings/clock/r8a7740-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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| D | r8a7743.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
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| D | r8a7744.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7744-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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| D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
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| D | r8a7791.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
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| D | r8a7745.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7745-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
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| D | r8a7790.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
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| /Linux-v5.4/Documentation/devicetree/bindings/arm/ux500/ |
| D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains
3 UX500 supports multiple PM domains which are used to gate power to one or
6 The implementation of PM domains for UX500 are based upon the generic PM domain
12 - compatible: Must be "stericsson,ux500-pm-domains".
13 - #power-domain-cells : Number of cells in a power domain specifier, must be 1.
17 compatible = "stericsson,ux500-pm-domains";
18 #power-domain-cells = <1>;
24 - power-domains: A phandle and PM domain specifier. Below are the list of
28 ----- ---------
34 power-domains = <&pm_domains DOMAIN_VAPE>
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| /Linux-v5.4/Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,disp.txt | 29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
32 "mediatek,<chip>-disp-wdma" - write DMA
33 "mediatek,<chip>-disp-color" - color processor
34 "mediatek,<chip>-disp-aal" - adaptive ambient light controller
35 "mediatek,<chip>-disp-gamma" - gamma correction
36 "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
37 "mediatek,<chip>-disp-split" - split stream to two encoders
38 "mediatek,<chip>-disp-ufoe" - data compression engine
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| /Linux-v5.4/Documentation/devicetree/bindings/soc/rockchip/ |
| D | power_domain.txt | 1 * Rockchip Power Domains
3 Rockchip processors include support for multiple power domains which can be
4 powered up/down by software based on different application scenes to save power.
6 Required properties for power domain controller:
7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
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