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/Linux-v6.1/include/media/
Dv4l2-dv-timings.h146 * @polarities: the horizontal and vertical polarities (same as struct
147 * v4l2_bt_timings polarities).
156 unsigned active_width, u32 polarities, bool interlaced,
165 * @polarities: the horizontal and vertical polarities (same as struct
166 * v4l2_bt_timings polarities).
180 u32 polarities, bool interlaced, struct v4l2_fract aspect,
Dv4l2-mediabus.h109 * @lane_polarity: the polarities of the clock (index 0) and data lanes
/Linux-v6.1/drivers/media/v4l2-core/
Dv4l2-dv-timings.c276 t1->bt.polarities == t2->bt.polarities && in v4l2_match_dv_timings()
327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
481 * @polarities - the horizontal and vertical polarities (same as struct
482 * v4l2_bt_timings polarities).
494 u32 polarities, in v4l2_detect_cvt() argument
507 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_cvt()
509 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_cvt()
629 fmt->bt.polarities = polarities; in v4l2_detect_cvt()
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Dv4l2-fwnode.c187 rval = fwnode_property_count_u32(fwnode, "lane-polarities"); in v4l2_fwnode_endpoint_parse_csi2_bus()
190 pr_warn("invalid number of lane-polarities entries (need %u, got %u)\n", in v4l2_fwnode_endpoint_parse_csi2_bus()
240 "lane-polarities", array, in v4l2_fwnode_endpoint_parse_csi2_bus()
249 pr_debug("no lane polarities defined, assuming not inverted\n"); in v4l2_fwnode_endpoint_parse_csi2_bus()
/Linux-v6.1/drivers/media/i2c/
Dst-mipid02.c436 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_clk_lane() local
443 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
449 bool are_lanes_swap, bool *polarities) in mipid02_configure_data0_lane() argument
451 bool are_pin_swap = are_lanes_swap ? polarities[2] : polarities[1]; in mipid02_configure_data0_lane()
468 bool are_lanes_swap, bool *polarities) in mipid02_configure_data1_lane() argument
470 bool are_pin_swap = are_lanes_swap ? polarities[1] : polarities[2]; in mipid02_configure_data1_lane()
486 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_from_rx() local
495 polarities); in mipid02_configure_from_rx()
500 polarities); in mipid02_configure_from_rx()
Dths7303.c294 "timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n", in ths7303_log_status()
300 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
Dths8200.c336 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) { in ths8200_setup()
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
/Linux-v6.1/drivers/gpu/drm/arm/
Dhdlcd_crtc.c133 unsigned int polarities, err; in hdlcd_crtc_mode_set_nofb() local
142 polarities = HDLCD_POLARITY_DATAEN | HDLCD_POLARITY_DATA; in hdlcd_crtc_mode_set_nofb()
145 polarities |= HDLCD_POLARITY_HSYNC; in hdlcd_crtc_mode_set_nofb()
147 polarities |= HDLCD_POLARITY_VSYNC; in hdlcd_crtc_mode_set_nofb()
161 hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities); in hdlcd_crtc_mode_set_nofb()
Dhdlcd_regs.h55 /* polarities */
/Linux-v6.1/Documentation/devicetree/bindings/media/
Dvideo-interfaces.yaml125 that if HSYNC and VSYNC polarities are not specified, embedded
197 lane-polarities:
204 An array of polarities of the lanes starting from the clock lane and
208 lane-polarities property is omitted, the value must be interpreted as 0
Drenesas,vin.yaml87 If both HSYNC and VSYNC polarities are not specified, embedded
93 If both HSYNC and VSYNC polarities are not specified, embedded
136 If both HSYNC and VSYNC polarities are not specified, embedded
142 If both HSYNC and VSYNC polarities are not specified, embedded
Dti,omap3isp.txt48 lane-polarities : lane polarity (required on CSI-2)
/Linux-v6.1/Documentation/devicetree/bindings/display/bridge/
Dti,sn65dsi86.yaml137 lane-polarities:
147 lane-polarities: [data-lanes]
271 lane-polarities = <0 1 0 1>;
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr8a779a0-falcon-csi-dsi.dtsi130 lane-polarities = <0 0 0 0 1>;
151 lane-polarities = <0 0 0 0 1>;
/Linux-v6.1/arch/sh/include/asm/
Dsh7760fb.h145 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
146 * data above; however the polarities of the following signals
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-lazor-r0.dts25 lane-polarities = <1 0>;
/Linux-v6.1/drivers/spi/
Dspi-bcm63xx-hsspi.c243 /* only change actual polarities if there is no transfer */ in bcm63xx_hsspi_setup()
283 * e. At the end restore the polarities again to their default values. in bcm63xx_hsspi_transfer_one()
431 /* read out default CS polarities */ in bcm63xx_hsspi_probe()
/Linux-v6.1/Documentation/userspace-api/media/v4l/
Ddv-timings.rst20 width and height, signal polarities, frontporches, backporches, sync
Dvidioc-g-dv-timings.rst108 - ``polarities``
109 - This is a bit mask that defines polarities of sync signals. bit 0
/Linux-v6.1/drivers/media/platform/aspeed/
Daspeed-video.c772 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
776 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
782 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
786 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
918 det->polarities &= ~V4L2_DV_VSYNC_POS_POL; in aspeed_video_get_timings()
920 det->polarities |= V4L2_DV_VSYNC_POS_POL; in aspeed_video_get_timings()
922 det->polarities &= ~V4L2_DV_HSYNC_POS_POL; in aspeed_video_get_timings()
924 det->polarities |= V4L2_DV_HSYNC_POS_POL; in aspeed_video_get_timings()
926 if (det->polarities & V4L2_DV_VSYNC_POS_POL) { in aspeed_video_get_timings()
936 if (det->polarities & V4L2_DV_HSYNC_POS_POL) { in aspeed_video_get_timings()
/Linux-v6.1/arch/arm/boot/dts/
Domap3-n9.dts56 lane-polarities = <1 1 1>;
/Linux-v6.1/Documentation/devicetree/bindings/media/i2c/
Dst,st-mipid02.txt40 - lane-polarities: any lane can be inverted or not.
/Linux-v6.1/drivers/video/fbdev/geode/
Dvideo_gx.c266 /* Only change the sync polarities if we are running in gx_configure_display()
267 * in CRT mode. The FP polarities will be handled in in gx_configure_display()
Dvideo_cs5530.c124 /* Sync polarities. */ in cs5530_configure_display()
/Linux-v6.1/drivers/media/dvb-frontends/
Dtda1004x.c651 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()
655 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()
659 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x00); // set AGC polarities in tda10046_init()
665 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()

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