Searched full:pll_ref_clk (Results 1 – 10 of 10) sorted by relevance
| /Linux-v6.1/drivers/phy/cadence/ |
| D | cdns-dphy.c | 109 struct clk *pll_ref_clk; member
125 unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); in cdns_dsi_get_dphy_pll_cfg()
385 clk_prepare_enable(dphy->pll_ref_clk); in cdns_dphy_power_on()
398 clk_disable_unprepare(dphy->pll_ref_clk); in cdns_dphy_power_off()
434 dphy->pll_ref_clk = devm_clk_get(&pdev->dev, "pll_ref"); in cdns_dphy_probe()
435 if (IS_ERR(dphy->pll_ref_clk)) in cdns_dphy_probe()
436 return PTR_ERR(dphy->pll_ref_clk); in cdns_dphy_probe()
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| /Linux-v6.1/arch/mips/cavium-octeon/ |
| D | octeon-usb.c | 32 * HighSpeed PLL uses PLL_REF_CLK for reference clck
34 * HighSpeed PLL uses PLL_REF_CLK for reference clck
322 else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) in dwc3_octeon_clocks_start()
325 pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_clocks_start()
330 else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) in dwc3_octeon_clocks_start()
333 pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_clocks_start()
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| /Linux-v6.1/drivers/clk/ |
| D | clk-tps68470.c | 48 * PLL_REF_CLK should be as close as possible to 100kHz
49 * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30)
51 * PLL_VCO_CLK = (PLL_REF_CLK * (plldiv*2 + 320))
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| /Linux-v6.1/Documentation/devicetree/bindings/phy/ |
| D | cdns,dphy.yaml | 53 clocks = <&psm_clk>, <&pll_ref_clk>;
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| /Linux-v6.1/drivers/phy/xilinx/ |
| D | phy-zynqmp.c | 173 * @pll_ref_clk: value to be written to register for corresponding ref clk rate
179 u8 pll_ref_clk; member
349 PLL_FREQ_MASK, ssc->pll_ref_clk); in xpsgtr_configure_pll()
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| /Linux-v6.1/drivers/crypto/cavium/nitrox/ |
| D | nitrox_hal.c | 8 #define PLL_REF_CLK 50 macro
620 ndev->hw.freq = (rst_boot.pnr_mul + 3) * PLL_REF_CLK; in nitrox_get_hwinfo()
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| /Linux-v6.1/drivers/gpu/drm/kmb/ |
| D | kmb_dsi.c | 870 /* pll_ref_clk: - valid range: 2~64 MHz; Typically 24 MHz in mipi_tx_pll_setup()
876 * -conditions: - (pll_ref_clk / N) >= 2 MHz in mipi_tx_pll_setup()
877 * -(pll_ref_clk / N) <= 8 MHz in mipi_tx_pll_setup()
881 * -Fvco = (M/N) * pll_ref_clk in mipi_tx_pll_setup()
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| /Linux-v6.1/drivers/misc/habanalabs/goya/ |
| D | goya.c | 770 freq = PLL_REF_CLK; in goya_fetch_psoc_frequency()
772 freq = PLL_REF_CLK / (div_fctr + 1); in goya_fetch_psoc_frequency()
775 pll_clk = PLL_REF_CLK * (nf + 1) / in goya_fetch_psoc_frequency()
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| /Linux-v6.1/drivers/misc/habanalabs/gaudi/ |
| D | gaudi.c | 931 freq = PLL_REF_CLK; in gaudi_fetch_psoc_frequency()
933 freq = PLL_REF_CLK / (div_fctr + 1); in gaudi_fetch_psoc_frequency()
936 pll_clk = PLL_REF_CLK * (nf + 1) / in gaudi_fetch_psoc_frequency()
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| /Linux-v6.1/drivers/misc/habanalabs/common/ |
| D | habanalabs.h | 1228 #define PLL_REF_CLK 50 macro
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