Searched +full:pl353 +full:- +full:smc +full:- +full:r2p1 (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ARM PL353 Static Memory Controller (SMC) device-tree bindings10 - Miquel Raynal <miquel.raynal@bootlin.com>11 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>14 The PL353 Static Memory Controller is a bus where you can connect two kinds23 const: arm,pl353-smc-r2p125 - compatible[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: PL353 NAND Controller device tree bindings10 - $ref: "nand-controller.yaml"13 - Miquel Raynal <miquel.raynal@bootlin.com>14 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>19 - const: arm,pl353-nand-r2p123 - items:[all …]
1 // SPDX-License-Identifier: GPL-2.03 * ARM PL353 SMC driver5 * Copyright (C) 2012 - 2018 Xilinx, Inc18 * struct pl353_smc_data - Private smc driver structure31 clk_disable(pl353_smc->memclk); in pl353_smc_suspend()32 clk_disable(pl353_smc->aclk); in pl353_smc_suspend()42 ret = clk_enable(pl353_smc->aclk); in pl353_smc_resume()48 ret = clk_enable(pl353_smc->memclk); in pl353_smc_resume()51 clk_disable(pl353_smc->aclk); in pl353_smc_resume()63 .compatible = "cfi-flash"[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) 2011 - 2014 Xilinx7 #address-cells = <1>;8 #size-cells = <1>;9 compatible = "xlnx,zynq-7000";12 #address-cells = <1>;13 #size-cells = <0>;16 compatible = "arm,cortex-a9";20 clock-latency = <1000>;21 cpu0-supply = <®ulator_vccpint>;[all …]
1 // SPDX-License-Identifier: GPL-2.033 #define PL35X_NANDC_DRIVER_NAME "pl35x-nand-controller"35 /* SMC controller status register (RO) */38 /* SMC clear config register (WO) */43 /* SMC direct command register (WO) */47 /* SMC set cycles register (WO) */56 /* SMC set opmode register (WO) */60 /* SMC ECC status register (RO) */63 /* SMC ECC configuration register */70 /* SMC ECC command 1 register */[all …]
9 -------------------------20 SMC etherpower for that.)30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------[all …]
