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/Linux-v6.1/drivers/i3c/master/mipi-i3c-hci/
Dpio.c20 * PIO Access Area
141 struct hci_pio_data *pio; in hci_pio_init() local
144 pio = kzalloc(sizeof(*pio), GFP_KERNEL); in hci_pio_init()
145 if (!pio) in hci_pio_init()
148 hci->io_data = pio; in hci_pio_init()
149 spin_lock_init(&pio->lock); in hci_pio_init()
174 pio->rx_thresh_size = 2 << rx_thresh; in hci_pio_init()
175 pio->tx_thresh_size = 2 << tx_thresh; in hci_pio_init()
178 pio->rx_thresh_size = 1 << rx_thresh; in hci_pio_init()
179 pio->tx_thresh_size = 1 << tx_thresh; in hci_pio_init()
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/Linux-v6.1/drivers/pinctrl/sunxi/
DKconfig15 bool "Support for the Allwinner A10, A20 and R40 PIO"
20 bool "Support for the Allwinner A10s, A13, R8 and NextThing GR8 PIO"
25 bool "Support for the Allwinner A31 PIO"
30 bool "Support for the Allwinner A31 R-PIO"
35 bool "Support for the Allwinner A23 PIO"
40 bool "Support for the Allwinner A33 PIO"
45 bool "Support for the Allwinner A83T PIO"
50 bool "Support for the Allwinner A83T R-PIO"
55 bool "Support for the Allwinner A23 and A33 R-PIO"
60 bool "Support for the Allwinner H3 PIO"
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/Linux-v6.1/drivers/pinctrl/
Dpinctrl-at91.c40 * @pioc_hwirq: PIO bank interrupt identifier on AIC
41 * @pioc_virq: PIO bank Linux virtual interrupt
42 * @pioc_idx: PIO bank index
43 * @regbase: PIO bank virtual address
190 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
191 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
192 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
193 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
194 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
195 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
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/Linux-v6.1/drivers/net/wireless/broadcom/b43legacy/
Dpio.c6 PIO Transmission
14 #include "pio.h"
109 /* We use the upper 4 bits for the PIO in generate_cookie()
140 struct b43legacy_pio *pio = &dev->pio; in parse_cookie() local
146 queue = pio->queue0; in parse_cookie()
149 queue = pio->queue1; in parse_cookie()
152 queue = pio->queue2; in parse_cookie()
155 queue = pio->queue3; in parse_cookie()
226 b43legacywarn(queue->dev->wl, "PIO queue too small. " in pio_tx_packet()
343 b43legacyerr(dev->wl, "This card does not support PIO " in b43legacy_setup_pioqueue()
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DKconfig75 bool "DMA + PIO"
79 Include both, Direct Memory Access (DMA) and Programmed I/O (PIO)
81 the module parameter "pio". With pio=0 as a module parameter, the
82 default DMA is used, otherwise PIO is used.
91 This reduces the size of the driver module, by omitting the PIO code.
94 bool "PIO (Programmed I/O) only"
97 Only include Programmed I/O (PIO).
99 Please note that PIO transfers are slow (compared to DMA).
101 Also note that not all devices of the b43legacy series support PIO.
103 You should use PIO only if DMA does not work for you.
/Linux-v6.1/drivers/net/wireless/broadcom/b43/
Dpio.c6 PIO data transfer
14 #include "pio.h"
30 * PIO controller ID and store the packet index number in generate_cookie()
48 struct b43_pio *pio = &dev->pio; in parse_cookie() local
54 q = pio->tx_queue_AC_BK; in parse_cookie()
57 q = pio->tx_queue_AC_BE; in parse_cookie()
60 q = pio->tx_queue_AC_VI; in parse_cookie()
63 q = pio->tx_queue_AC_VO; in parse_cookie()
66 q = pio->tx_queue_mcast; in parse_cookie()
172 /* Enable Direct FIFO RX (PIO) on the engine. */ in b43_setup_pioqueue_rx()
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/Linux-v6.1/drivers/ata/
Dpata_artop.c86 * artop6210_load_piomode - Load a set of PATA PIO timings
89 * @pio: PIO mode
91 * Set PIO mode for device, in host controller PCI config space. This
92 * is used both to set PIO timings in PIO mode and also to set the
93 * matching PIO clocking for UDMA, as well as the MWDMA timings.
99 static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio) in artop6210_load_piomode() argument
108 /* Load the PIO timing active/recovery bits */ in artop6210_load_piomode()
109 pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]); in artop6210_load_piomode()
113 * artop6210_set_piomode - Initialize host controller PATA PIO timings
117 * Set PIO mode for device, in host controller PCI config space. For
[all …]
Dpata_cs5520.c8 * PIO mode and smarter silicon.
11 * drive for the right PIO mode. We must also ignore all the blacklists
13 * further we can do DMA on PIO only drives.
52 * cs5520_set_timings - program PIO timings
55 * @pio: PIO ID
57 * Program the PIO mode timings for the controller according to the pio
61 static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio) in cs5520_set_timings() argument
66 pio -= XFER_PIO_0; in cs5520_set_timings()
70 (cs5520_pio_clocks[pio].recovery << 4) | in cs5520_set_timings()
71 (cs5520_pio_clocks[pio].assert)); in cs5520_set_timings()
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Dpata_efar.c74 * efar_set_piomode - Initialize host controller PATA PIO timings
78 * Set PIO mode for device, in host controller PCI config space.
86 unsigned int pio = adev->pio_mode - XFER_PIO_0; in efar_set_piomode() local
106 if (pio > 1) in efar_set_piomode()
108 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ in efar_set_piomode()
122 master_data |= (timings[pio][0] << 12) | in efar_set_piomode()
123 (timings[pio][1] << 8); in efar_set_piomode()
134 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; in efar_set_piomode()
193 * MWDMA is driven by the PIO timings. We must also enable in efar_set_dmamode()
195 * been set when the PIO timing was set. in efar_set_dmamode()
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Dpata_it8213.c65 * it8213_set_piomode - Initialize host controller PATA PIO timings
69 * Set PIO mode for device, in host controller PCI config space.
77 unsigned int pio = adev->pio_mode - XFER_PIO_0; in it8213_set_piomode() local
95 if (pio > 1) in it8213_set_piomode()
97 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ in it8213_set_piomode()
109 master_data |= (timings[pio][0] << 12) | in it8213_set_piomode()
110 (timings[pio][1] << 8); in it8213_set_piomode()
120 slave_data |= (timings[pio][0] << 2) | timings[pio][1]; in it8213_set_piomode()
188 * MWDMA is driven by the PIO timings. We must also enable in it8213_set_dmamode()
190 * been set when the PIO timing was set. in it8213_set_dmamode()
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Dpata_rdc.c78 * rdc_set_piomode - Initialize host controller PATA PIO timings
82 * Set PIO mode for device, in host controller PCI config space.
90 unsigned int pio = adev->pio_mode - XFER_PIO_0; in rdc_set_piomode() local
108 if (pio >= 2) in rdc_set_piomode()
118 /* PIO configuration clears DTE unconditionally. It will be in rdc_set_piomode()
133 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) in rdc_set_piomode()
142 (timings[pio][0] << 12) | in rdc_set_piomode()
143 (timings[pio][1] << 8); in rdc_set_piomode()
160 * rdc_set_dmamode - Initialize host controller PATA PIO timings
228 * MWDMA is driven by the PIO timings. We must also enable in rdc_set_dmamode()
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Dpata_oldpiix.c54 * oldpiix_set_piomode - Initialize host controller PATA PIO timings
58 * Set PIO mode for device, in host controller PCI config space.
66 unsigned int pio = adev->pio_mode - XFER_PIO_0; in oldpiix_set_piomode() local
85 if (pio > 1) in oldpiix_set_piomode()
107 idetm_data |= (timings[pio][0] << 12) | in oldpiix_set_piomode()
108 (timings[pio][1] << 8); in oldpiix_set_piomode()
140 * MWDMA is driven by the PIO timings. We must also enable in oldpiix_set_dmamode()
142 * been set when the PIO timing was set. in oldpiix_set_dmamode()
150 int pio = needed_pio[mwdma] - XFER_PIO_0; in oldpiix_set_dmamode() local
159 /* If the drive MWDMA is faster than it can do PIO then in oldpiix_set_dmamode()
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Dpata_atiixp.c93 * atiixp_set_pio_timing - set initial PIO mode data
96 * @pio: Requested PIO
98 * Called by both the pio and dma setup functions to set the controller
99 * timings for PIO transfers. We must load both the mode number and
103 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio) in atiixp_set_pio_timing() argument
115 pio_mode_data |= pio << (4 * dn); in atiixp_set_pio_timing()
120 pio_timing_data |= (pio_timings[pio] << timing_shift); in atiixp_set_pio_timing()
125 * atiixp_set_piomode - set initial PIO mode data
129 * Called to do the PIO mode setup. We use a shared helper for this
130 * as the DMA setup must also adjust the PIO timing information.
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Dpata_radisys.c30 * radisys_set_piomode - Initialize host controller PATA PIO timings
34 * Set PIO mode for device, in host controller PCI config space.
42 unsigned int pio = adev->pio_mode - XFER_PIO_0; in radisys_set_piomode() local
61 if (pio > 0) in radisys_set_piomode()
72 idetm_data |= (timings[pio][0] << 12) | in radisys_set_piomode()
73 (timings[pio][1] << 8); in radisys_set_piomode()
105 * MWDMA is driven by the PIO timings. We must also enable in radisys_set_dmamode()
117 int pio = needed_pio[mwdma] - XFER_PIO_0; in radisys_set_dmamode() local
120 /* If the drive MWDMA is faster than it can do PIO then in radisys_set_dmamode()
121 we must force PIO0 for PIO cycles. */ in radisys_set_dmamode()
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/Linux-v6.1/arch/arm/boot/dts/
Dsun4i-a10-inet9f-rev03.dts71 gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */
79 gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */
87 gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */
95 gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */
103 gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */
111 gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */
119 gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */
127 gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */
135 gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */
143 gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */
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Dsun7i-a20-cubietruck.dts80 gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
85 gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
90 gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;
95 gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
101 reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
202 cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
216 interrupt-parent = <&pio>;
234 &pio {
247 gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>;
287 gpio = <&pio 7 17 GPIO_ACTIVE_HIGH>;
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/Linux-v6.1/arch/mips/sgi-ip27/
Dip27-hubio.c6 * Support functions for the HUB ASIC - mostly PIO mapping related.
22 * hub_pio_map - establish a HUB PIO mapping
24 * @hub: hub to perform PIO mapping on
25 * @widget: widget ID to perform PIO mapping for
27 * @size: size of the PIO mapping
40 printk(KERN_WARNING "PIO mapping at hub %d widget %d addr 0x%lx" in hub_pio_map()
52 * The code below does a PIO write to setup an ITTE entry. in hub_pio_map()
57 * attempt a PIO prematurely. in hub_pio_map()
60 * received by the hub and can be used by future PIO reads/ in hub_pio_map()
63 * For these two reasons, we PIO read back the ITTE entry in hub_pio_map()
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/Linux-v6.1/lib/
Dlogic_pio.c9 #define pr_fmt(fmt) "LOGIC PIO: " fmt
27 * logic_pio_register_range - register logical PIO range for a host
107 * logic_pio_unregister_range - unregister a logical PIO range for a host
121 * find_io_range_by_fwnode - find logical PIO range for given FW node
122 * @fwnode: FW node handle associated with logical PIO range
144 /* Return a registered range given an input PIO token */
145 static struct logic_pio_hwaddr *find_io_range(unsigned long pio) in find_io_range() argument
151 if (in_range(pio, range->io_start, range->size)) { in find_io_range()
159 pr_err("PIO entry token 0x%lx invalid\n", pio); in find_io_range()
165 * logic_pio_to_hwaddr - translate logical PIO to HW address
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/Linux-v6.1/arch/powerpc/include/asm/
Dio-defs.h23 DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port), pio, port)
24 DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port), pio, port)
25 DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port), pio, port)
26 DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port), pio, port)
27 DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port), pio, port)
28 DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port), pio, port)
44 (p, b, c), pio, p)
46 (p, b, c), pio, p)
48 (p, b, c), pio, p)
50 (p, b, c), pio, p)
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8183-kukui-jacuzzi.dtsi30 gpio = <&pio 54 GPIO_ACTIVE_HIGH>;
42 gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
56 gpio = <&pio 35 GPIO_ACTIVE_HIGH>;
68 gpio = <&pio 37 GPIO_ACTIVE_HIGH>;
81 gpios = <&pio 6 GPIO_ACTIVE_LOW>;
89 gpios = <&pio 5 GPIO_ACTIVE_LOW>;
124 interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
126 reset-gpios = <&pio 156 GPIO_ACTIVE_LOW>;
143 interrupts-extended = <&pio 7 IRQ_TYPE_LEVEL_LOW>;
161 enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
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/Linux-v6.1/arch/mips/include/asm/sgi/
Dhpc3.h77 #define HPC3_SCTRL_AMASK 0x20 /* DMA active inhibits PIO */
95 volatile u32 pconfig; /* PIO configuration register */
100 #define HPC3_SPCFG_HW 0x1000 /* Enable 16-bit halfword PIO accesses to scsi */
101 #define HPC3_SPCFG_SWAP 0x2000 /* Byte swap all PIO accesses */
102 #define HPC3_SPCFG_EPAR 0x4000 /* Enable parity checking for PIO */
103 #define HPC3_SPCFG_FUJI 0x8000 /* Fujitsu scsi controller mode for faster dma/pio */
125 #define HPC3_ERXCTRL_AMASK 0x00000400 /* Tells if ACTIVE inhibits PIO's to hpc3 */
137 #define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
138 #define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
139 #define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
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/Linux-v6.1/drivers/soc/fsl/qe/
Dqe_io.c144 struct device_node *pio; in par_io_of_config() local
153 pio = of_parse_phandle(np, "pio-handle", 0); in par_io_of_config()
154 if (pio == NULL) { in par_io_of_config()
155 printk(KERN_ERR "pio-handle not available\n"); in par_io_of_config()
159 pio_map = of_get_property(pio, "pio-map", &pio_map_len); in par_io_of_config()
161 printk(KERN_ERR "pio-map is not set!\n"); in par_io_of_config()
166 printk(KERN_ERR "pio-map format wrong!\n"); in par_io_of_config()
183 of_node_put(pio); in par_io_of_config()
/Linux-v6.1/virt/kvm/
Dcoalesced_mmio.c89 ring->coalesced_mmio[insert].pio = dev->zone.pio; in coalesced_mmio_write()
143 if (zone->pio != 1 && zone->pio != 0) in kvm_vm_ioctl_register_coalesced_mmio()
157 zone->pio ? KVM_PIO_BUS : KVM_MMIO_BUS, in kvm_vm_ioctl_register_coalesced_mmio()
179 if (zone->pio != 1 && zone->pio != 0) in kvm_vm_ioctl_unregister_coalesced_mmio()
185 if (zone->pio == dev->zone.pio && in kvm_vm_ioctl_unregister_coalesced_mmio()
188 zone->pio ? KVM_PIO_BUS : KVM_MMIO_BUS, &dev->dev); in kvm_vm_ioctl_unregister_coalesced_mmio()
/Linux-v6.1/arch/mips/include/asm/sn/sn0/
Dhubni.h35 #define NI_VECTOR_PARMS 0x600200 /* Vector PIO routing parameters */
36 #define NI_VECTOR 0x600208 /* Vector PIO route */
37 #define NI_VECTOR_DATA 0x600210 /* Vector PIO data */
38 #define NI_VECTOR_STATUS 0x600300 /* Vector PIO return status */
39 #define NI_RETURN_VECTOR 0x600308 /* Vector PIO return vector */
40 #define NI_VECTOR_READ_DATA 0x600310 /* Vector PIO read data */
41 #define NI_VECTOR_CLEAR 0x600380 /* Vector PIO read & clear status */
43 #define NI_IO_PROTECT 0x600400 /* PIO protection bits */
44 #define NI_IO_PROT_OVRRD 0x600408 /* PIO protection bit override */
47 #define NI_AGE_CPU0_PIO 0x600508 /* CPU 0 PIO age control */
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/Linux-v6.1/Documentation/w1/slaves/
Dw1_ds28e04.rst7 * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
20 Support is provided through the sysfs files "eeprom" and "pio". CRC checking
35 PIO Access
37 The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.
39 The current status of the PIO's is returned as an 8 bit value. Bit 0/1
40 represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are

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