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/Linux-v5.10/drivers/media/cec/core/
Dcec-pin.c10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
111 static void cec_pin_update(struct cec_pin *pin, bool v, bool force) in cec_pin_update() argument
113 if (!force && v == pin->adap->cec_pin_is_high) in cec_pin_update()
116 pin->adap->cec_pin_is_high = v; in cec_pin_update()
117 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) { in cec_pin_update()
120 if (pin->work_pin_events_dropped) { in cec_pin_update()
121 pin->work_pin_events_dropped = false; in cec_pin_update()
124 pin->work_pin_events[pin->work_pin_events_wr] = ev; in cec_pin_update()
125 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get(); in cec_pin_update()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt7622.txt10 - #gpio-cells: Should be two. The first cell is the pin number and the
23 phrase "pin configuration node".
25 MT7622 pin configuration nodes act as a container for an arbitrary number of
27 pin, a group, or a list of pins or groups. This configuration can include the
28 mux function to select on those pin(s)/group(s), and various pin configuration
55 - pins: An array of strings. Each string contains the name of a pin.
83 pins can be referenced via the pin names as the below table shown and the
88 Pin #: Valid values for pins
90 PIN 0: "GPIO_A"
91 PIN 1: "I2S1_IN"
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Dsamsung-pinctrl.txt1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
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Dpinctrl-bindings.txt3 Hardware modules that control pin multiplexing or configuration parameters
4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
5 controllers. Each pin controller must be represented as a node in device tree,
8 Hardware modules whose signals are affected by pin configuration are
12 For a client device to operate correctly, certain pin controllers must
13 set up certain specific pin configurations. Some client devices need a
14 single static pin configuration, e.g. set up during initialization. Others
21 for client device device tree nodes to map those state names to the pin
24 Note that pin controllers themselves may also be client devices of themselves.
25 For example, a pin controller may set up its own "active" state when the
[all …]
Dpinmux-node.yaml7 title: Generic pin multiplexing node schema
13 The contents of the pin configuration child nodes are defined by the binding
14 for the individual pin controller device. The pin configuration nodes need not
15 be direct children of the pin controller device; they may be grandchildren,
18 the binding for the individual pin controller device.
20 While not required to be used, there are 3 generic forms of pin muxing nodes
21 which pin controller devices can use.
23 pin multiplexing nodes:
45 pin controller hardware. For hardware where there is a large number of identical
46 pin controller instances, naming each pin and function can easily become
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/Linux-v5.10/arch/arm/boot/dts/
Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Ds5pv210-pinctrl.dtsi24 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
25 samsung,pin-pud-pdn = <S3C64XX_PIN_PULL_ ##_pull>; \
283 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
284 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
291 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
298 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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Dexynos4412-pinctrl.dtsi3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
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Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
16 * Pin banks
131 * Pin groups
136 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
142 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
25 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
26 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
27 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
33 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
34 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
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Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
/Linux-v5.10/arch/arm64/boot/dts/exynos/
Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
14 #define PIN(_func, _pin, _pull, _drv) \ macro
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
136 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
141 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
[all …]
Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
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/Linux-v5.10/drivers/pinctrl/qcom/
Dpinctrl-ssbi-mpp.c88 * struct pm8xxx_pin_data - dynamic configuration for a pin
91 * @mode: operating mode for the pin (digital, analog or current sink)
92 * @input: pin is input
93 * @output: pin is output
94 * @high_z: pin is floating
165 struct pm8xxx_pin_data *pin) in pm8xxx_mpp_update() argument
173 switch (pin->mode) { in pm8xxx_mpp_update()
175 if (pin->dtest) { in pm8xxx_mpp_update()
177 ctrl = pin->dtest - 1; in pm8xxx_mpp_update()
178 } else if (pin->input && pin->output) { in pm8xxx_mpp_update()
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Dpinctrl-ssbi-gpio.c57 * struct pm8xxx_pin_data - dynamic configuration for a pin
61 * @mode: operating mode for the pin (input/output)
68 * @disable: pin disabled / configured as tristate
70 * @inverted: pin logic is inverted
126 struct pm8xxx_pin_data *pin, int bank) in pm8xxx_read_bank() argument
131 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_read_bank()
137 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_read_bank()
147 struct pm8xxx_pin_data *pin, in pm8xxx_write_bank() argument
156 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_write_bank()
226 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux() local
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/Linux-v5.10/drivers/pinctrl/renesas/
Dpinctrl-rza1.c3 * Combined GPIO and pin controller support for Renesas RZ/A1 (r7s72100) SoC
9 * This pin controller/gpio combined driver supports Renesas devices of RZ/A1
56 * Use 16 lower bits [15:0] for pin identifier
57 * Use 16 higher bits [31:16] for pin mux function
69 /* Pin mux flags */
79 * rza1_bidir_pin - describe a single pin that needs bidir flag applied.
82 u8 pin: 4; member
96 * rza1_swio_pin - describe a single pin that needs swio flag applied.
99 u16 pin: 4; member
126 { .pin = 0, .func = 1 },
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DKconfig9 bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH)
53 This enables pin control drivers for Renesas SuperH and ARM platforms
61 This enables common pin control functionality for EMMA Mobile, R-Car,
69 This enables pin control and GPIO drivers for SH/SH Mobile platforms
78 bool "pin control support for Emma Mobile EV2" if COMPILE_TEST
82 bool "pin control support for R-Car D3" if COMPILE_TEST
86 bool "pin control support for R-Car E2" if COMPILE_TEST
90 bool "pin control support for R-Car E3" if COMPILE_TEST
94 bool "pin control support for R-Car H1" if COMPILE_TEST
98 bool "pin control support for R-Car H2" if COMPILE_TEST
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/Linux-v5.10/arch/arm64/boot/dts/actions/
Ds900-bubblegum-96.dts69 * NC = not connected (pin out but not routed from the chip to
71 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
100 "GPIO-G", /* GPIO_6, LSEC pin 29 */
101 "GPIO-H", /* GPIO_7, LSEC pin 30 */
[all …]
/Linux-v5.10/drivers/pinctrl/
Dpinmux.c3 * Core driver for the pin muxing portions of the pin control subsystem
74 * pinmux_can_be_used_for_gpio() - check if a specific pin
77 * @pctldev: the associated pin controller device
78 * @pin: the pin number in the global pin space
83 bool pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned pin) in pinmux_can_be_used_for_gpio() argument
85 struct pin_desc *desc = pin_desc_get(pctldev, pin); in pinmux_can_be_used_for_gpio()
88 /* Can't inspect pin, assume it can be used */ in pinmux_can_be_used_for_gpio()
99 * pin_request() - request a single pin to be muxed in, typically for GPIO
100 * @pctldev: the associated pin controller device
101 * @pin: the pin number in the global pin space
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/Linux-v5.10/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.c50 * When pin number greater than type1_start and less than type1_end,
54 unsigned long pin) in mtk_get_regmap() argument
56 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) in mtk_get_regmap()
61 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin) in mtk_get_port() argument
64 return ((pin >> 4) & pctl->devdata->port_mask) in mtk_get_port()
109 static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, in mtk_pconf_set_ies_smt() argument
134 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), in mtk_pconf_set_ies_smt()
135 pin, pctl->devdata->port_align, value, arg); in mtk_pconf_set_ies_smt()
138 bit = BIT(pin & 0xf); in mtk_pconf_set_ies_smt()
146 reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt()
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