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/Linux-v6.1/drivers/phy/ti/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for TI platforms
6 tristate "TI DA8xx USB PHY Driver"
11 Enable this to support the USB PHY on DA8xx SoCs.
13 This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
16 tristate "TI dm816x USB PHY driver"
33 This option enables support for TI AM654 SerDes PHY used for
37 tristate "TI J721E WIZ (SERDES Wrapper) support"
47 SoC. WIZ is a serdes wrapper used to configure some of the input
53 tristate "OMAP CONTROL PHY Driver"
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/
Dacadia.dts11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
27 #address-cells = <1>;
28 #size-cells = <0>;
34 clock-frequency = <0>; /* Filled in by wrapper */
35 timebase-frequency = <0>; /* Filled in by wrapper */
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
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/Linux-v6.1/drivers/pci/controller/
Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * enum iproc_pcie_type - iProc PCIe interface type
11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for
14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
15 * @IPROC_PCIE_PAXC: PAXC-based host controllers
16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
18 * PAXB is the wrapper used in root complex that can be connected to an
21 * PAXC is the wrapper used in root complex dedicated for internal emulated
[all …]
/Linux-v6.1/drivers/gpu/drm/stm/
Ddw_mipi_dsi-stm.c1 // SPDX-License-Identifier: GPL-2.0
29 /* DSI wrapper registers & bit definitions */
31 #define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
35 #define DSI_WCR 0x0404 /* Wrapper Control Reg */
38 #define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
42 #define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
46 #define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
89 writel(val, dsi->base + reg); in dsi_write()
94 return readl(dsi->base + reg); in dsi_read()
150 return -EINVAL; in dsi_pll_get_params()
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/Linux-v6.1/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
16 #include <sound/omap-hdmi-audio.h>
20 /* HDMI Wrapper */
68 /* HDMI PHY */
276 /* HDMI wrapper funcs */
305 /* HDMI PHY funcs */
306 int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk,
308 void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s);
309 int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy);
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/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dqcom,gcc-sm8450.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
17 - dt-bindings/clock/qcom,gcc-sm8450.h
21 const: qcom,gcc-sm8450
25 - description: Board XO source
26 - description: Sleep clock source
27 - description: PCIE 0 Pipe clock source (Optional clock)
[all …]
Dqcom,gcc-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <tdas@codeaurora.org>
17 - dt-bindings/clock/qcom,gcc-sc7280.h
21 const: qcom,gcc-sc7280
25 - description: Board XO source
26 - description: Board active XO source
27 - description: Sleep clock source
[all …]
Dqcom,gcc-sm8350.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
17 - dt-bindings/clock/qcom,gcc-sm8350.h
21 const: qcom,gcc-sm8350
25 - description: Board XO source
26 - description: Sleep clock source
27 - description: PLL test clock source (Optional clock)
[all …]
Dqcom,gcc-sdx65.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vamsi krishna Lanka <quic_vamslank@quicinc.com>
17 - dt-bindings/clock/qcom,gcc-sdx65.h
21 const: qcom,gcc-sdx65
25 - description: Board XO source
26 - description: Board active XO source
27 - description: Sleep clock source
[all …]
/Linux-v6.1/drivers/gpu/drm/omapdrm/dss/
Dhdmi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
15 #include <sound/omap-hdmi-audio.h>
24 /* HDMI Wrapper */
72 /* HDMI PHY */
295 /* HDMI wrapper funcs */
323 /* HDMI PHY funcs */
324 int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk,
326 void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s);
327 int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy,
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dqcom,msm8996-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (MSM8996 PCIe)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
18 const: qcom,msm8996-qmp-pcie-phy
22 - description: serdes
24 "#address-cells":
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Dqcom,qmp-ufs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (UFS)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
19 - qcom,msm8996-qmp-ufs-phy
20 - qcom,msm8998-qmp-ufs-phy
21 - qcom,sc8180x-qmp-ufs-phy
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Dqcom,qmp-usb3-dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP USB3 DP PHY controller
11 - Wesley Cheng <quic_wcheng@quicinc.com>
16 - qcom,sc7180-qmp-usb3-dp-phy
17 - qcom,sc7280-qmp-usb3-dp-phy
18 - qcom,sc8180x-qmp-usb3-dp-phy
19 - qcom,sc8280xp-qmp-usb43dp-phy
[all …]
Dqcom,qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (PCIe)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
19 - qcom,ipq6018-qmp-pcie-phy
20 - qcom,ipq8074-qmp-gen3-pcie-phy
21 - qcom,ipq8074-qmp-pcie-phy
[all …]
Dqcom,qmp-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,msm8996-qmp-usb3-phy
[all …]
Dti,phy-j721e-wiz.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI J721E WIZ (SERDES Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
18 - ti,am64-wiz-10g
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dti,am62-usb.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
10 - Aswath Govindraju <a-govindraju@ti.com>
14 const: ti,am62-usb
21 power-domains:
25 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
32 clock-names:
[all …]
Dfsl,imx8mp-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Li Jun <jun.li@nxp.com>
15 const: fsl,imx8mp-dwc3
19 - description: Address and length of the register set for HSIO Block Control
20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
22 "#address-cells":
25 "#size-cells":
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dti,j721e-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI J721E PCI EP (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: "cdns-pcie-ep.yaml#"
19 - const: ti,j721e-pcie-ep
20 - description: PCIe EP controller in AM64
[all …]
Dti,j721e-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI J721E PCI Host (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: "cdns-pcie-host.yaml#"
19 - const: ti,j721e-pcie-host
20 - description: PCIe controller in AM64
[all …]
/Linux-v6.1/drivers/usb/core/
Dphy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * A wrapper for multiple PHYs which passes all phy_* function calls to
4 * multiple (actual) PHY devices. This is comes handy when initializing
12 #include <linux/phy/phy.h>
15 #include "phy.h"
18 struct phy *phy; member
26 struct phy *phy; in usb_phy_roothub_add_phy() local
28 phy = devm_of_phy_get_by_index(dev, dev->of_node, index); in usb_phy_roothub_add_phy()
29 if (IS_ERR(phy)) { in usb_phy_roothub_add_phy()
30 if (PTR_ERR(phy) == -ENODEV) in usb_phy_roothub_add_phy()
[all …]
/Linux-v6.1/drivers/usb/dwc2/
Dplatform.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * platform.c - DesignWare HS OTG Controller platform driver
13 #include <linux/dma-mapping.h>
17 #include <linux/phy/phy.h>
18 #include <linux/platform_data/s3c-hsotg.h>
39 * ------------------------------
41 * HST DEV any : ---
44 * DEV HST any : ---
56 hsotg->dr_mode = usb_get_dr_mode(hsotg->dev); in dwc2_get_dr_mode()
57 if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN) in dwc2_get_dr_mode()
[all …]
/Linux-v6.1/drivers/net/ethernet/intel/e1000e/
D80003es2lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
35 * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
40 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_80003es2lan() local
43 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_80003es2lan()
44 phy->type = e1000_phy_none; in e1000_init_phy_params_80003es2lan()
47 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_80003es2lan()
48 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan; in e1000_init_phy_params_80003es2lan()
51 phy->addr = 1; in e1000_init_phy_params_80003es2lan()
52 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_80003es2lan()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/ufs/
Dti,j721e-ufs.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
15 - const: ti,j721e-ufs
23 description: phandle to the M-PHY clock
25 power-domains:
28 assigned-clocks:
31 assigned-clock-parents:
[all …]
/Linux-v6.1/drivers/usb/dwc3/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
18 bool "Register ULPI PHY Interface"
21 Select this if you have ULPI type PHY attached to your DWC3
78 tristate "PCIe-based Platforms"
86 tristate "Synopsys PCIe-based HAPS Platforms"
139 This driver also handles Qscratch wrapper which is needed

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