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/Linux-v6.1/drivers/iio/imu/inv_icm42600/
Dinv_icm42600_timestamp.c13 /* internal chip period is 32kHz, 31250ns */
44 uint32_t period) in inv_icm42600_timestamp_init() argument
49 /* current multiplier and period values after reset */ in inv_icm42600_timestamp_init()
51 ts->period = default_period; in inv_icm42600_timestamp_init()
53 ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; in inv_icm42600_timestamp_init()
55 /* use theoretical value for chip period */ in inv_icm42600_timestamp_init()
71 uint32_t period, bool fifo) in inv_icm42600_timestamp_update_odr() argument
77 ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; in inv_icm42600_timestamp_update_odr()
82 static bool inv_validate_period(uint32_t period, uint32_t mult) in inv_validate_period() argument
87 /* check that period is acceptable */ in inv_validate_period()
[all …]
Dinv_icm42600_timestamp.h39 * @mult: current internal period multiplier
40 * @new_mult: new set internal period multiplier (not yet effective)
41 * @period: measured current period of the sensor
42 * @chip_period: accumulator for computing internal chip period
49 uint32_t period; member
54 uint32_t period);
59 uint32_t period, bool fifo);
68 ts->timestamp += ts->period; in inv_icm42600_timestamp_pop()
/Linux-v6.1/lib/
Dflex_proportions.c3 * Floating proportions with flexible aging period
14 * Where x_{i,j} is j's number of events in i-th last time period and x_i is
15 * total number of events in i-th last time period.
26 * When a new period is declared, we could do:
33 * occurs. This can bit trivially implemented by remembering last period in
42 p->period = 0; in fprop_global_init()
57 * Declare @periods new periods. It is upto the caller to make sure period
79 p->period += periods; in fprop_new_period()
93 pl->period = 0; in fprop_local_init_single()
105 unsigned int period = p->period; in fprop_reflect_period_single() local
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/Linux-v6.1/drivers/gpu/drm/tegra/
Dmipi-phy.c17 unsigned long period) in mipi_dphy_timing_get_default() argument
20 timing->clkpost = 70 + 52 * period; in mipi_dphy_timing_get_default()
30 timing->hsprepare = 65 + 5 * period; in mipi_dphy_timing_get_default()
31 timing->hszero = 145 + 5 * period; in mipi_dphy_timing_get_default()
32 timing->hssettle = 85 + 6 * period; in mipi_dphy_timing_get_default()
39 * T_HS-TRAIL = max(n * 8 * period, 60 + n * 4 * period) in mipi_dphy_timing_get_default()
43 * not parameterize on anything other that period, so this code will in mipi_dphy_timing_get_default()
46 timing->hstrail = max(4 * 8 * period, 60 + 4 * 4 * period); in mipi_dphy_timing_get_default()
63 unsigned long period) in mipi_dphy_timing_validate() argument
68 if (timing->clkpost < (60 + 52 * period)) in mipi_dphy_timing_validate()
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/Linux-v6.1/drivers/pwm/
Dpwm-visconti.c15 * running period is completed. This way the hardware switches atomically
17 * - Disabling the hardware completes the currently running period and keeps
50 u32 period, duty_cycle, pwmc0; in visconti_pwm_apply() local
58 * The biggest period the hardware can provide is in visconti_pwm_apply()
63 if (state->period > (0xffff << 3) * 1000) in visconti_pwm_apply()
64 period = (0xffff << 3) * 1000; in visconti_pwm_apply()
66 period = state->period; in visconti_pwm_apply()
68 if (state->duty_cycle > period) in visconti_pwm_apply()
69 duty_cycle = period; in visconti_pwm_apply()
78 period /= 1000; in visconti_pwm_apply()
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Dpwm-ntxec.c16 * - The period and duty cycle can't be changed together in one atomic action.
46 * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
59 int period, int duty) in ntxec_pwm_set_raw_period_and_duty_cycle() argument
64 * Changes to the period and duty cycle take effect as soon as the in ntxec_pwm_set_raw_period_and_duty_cycle()
66 * to an inconsistent state after the period is written and before the in ntxec_pwm_set_raw_period_and_duty_cycle()
68 * is longer than the new period, the EC may output 100% for a moment. in ntxec_pwm_set_raw_period_and_duty_cycle()
70 * To minimize the time between the changes to period and duty cycle in ntxec_pwm_set_raw_period_and_duty_cycle()
75 { NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8) }, in ntxec_pwm_set_raw_period_and_duty_cycle()
77 { NTXEC_REG_PERIOD_LOW, ntxec_reg8(period) }, in ntxec_pwm_set_raw_period_and_duty_cycle()
88 unsigned int period, duty; in ntxec_pwm_apply() local
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Dpwm-bcm2835.c21 #define PERIOD(x) (((x) * 0x10) + 0x10) macro
78 * period_cycles must be a 32 bit value, so period * rate / NSEC_PER_SEC in bcm2835_pwm_apply()
80 * multiplication period * rate doesn't overflow. in bcm2835_pwm_apply()
81 * To calculate the maximal possible period that guarantees the in bcm2835_pwm_apply()
84 * round(period * rate / NSEC_PER_SEC) <= U32_MAX in bcm2835_pwm_apply()
85 * <=> period * rate / NSEC_PER_SEC < U32_MAX + 0.5 in bcm2835_pwm_apply()
86 * <=> period * rate < (U32_MAX + 0.5) * NSEC_PER_SEC in bcm2835_pwm_apply()
87 * <=> period < ((U32_MAX + 0.5) * NSEC_PER_SEC) / rate in bcm2835_pwm_apply()
88 * <=> period < ((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate in bcm2835_pwm_apply()
89 * <=> period <= ceil((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate) - 1 in bcm2835_pwm_apply()
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Dcore.c143 pwm->args.period = args->args[1]; in of_pwm_xlate_with_flags()
171 pwm->args.period = args->args[0]; in of_pwm_single_xlate()
470 s2.duty_cycle = s1.period - s1.duty_cycle; in pwm_apply_state_debug()
471 s2.period = s1.period; in pwm_apply_state_debug()
478 state->duty_cycle < state->period) in pwm_apply_state_debug()
483 last->period > s2.period && in pwm_apply_state_debug()
484 last->period <= state->period) in pwm_apply_state_debug()
486 … ".apply didn't pick the best available period (requested: %llu, applied: %llu, possible: %llu)\n", in pwm_apply_state_debug()
487 state->period, s2.period, last->period); in pwm_apply_state_debug()
489 if (state->enabled && state->period < s2.period) in pwm_apply_state_debug()
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Dpwm-intel-lgm.c6 * - The hardware supports fixed period & configures only 2-wire mode.
9 * keep track of running period.
11 * and new setting for the first period. From second period, the output is
47 u32 period; member
71 /* The hardware only supports normal polarity and fixed period. */ in lgm_pwm_apply()
72 if (state->polarity != PWM_POLARITY_NORMAL || state->period < pc->period) in lgm_pwm_apply()
78 duty_cycle = min_t(u64, state->duty_cycle, pc->period); in lgm_pwm_apply()
79 val = duty_cycle * LGM_PWM_MAX_DUTY_CYCLE / pc->period; in lgm_pwm_apply()
98 state->period = pc->period; /* fixed period */ in lgm_pwm_get_state()
102 state->duty_cycle = DIV_ROUND_UP(duty * pc->period, LGM_PWM_MAX_DUTY_CYCLE); in lgm_pwm_get_state()
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Dpwm-fsl-ftm.c49 struct fsl_pwm_periodcfg period; member
125 rate = clk_get_rate(fpc->clk[fpc->period.clk_select]); in fsl_pwm_ticks_to_ns()
128 do_div(exval, rate >> fpc->period.clk_ps); in fsl_pwm_ticks_to_ns()
195 unsigned int period = fpc->period.mod_period + 1; in fsl_pwm_calculate_duty() local
196 unsigned int period_ns = fsl_pwm_ticks_to_ns(fpc, period); in fsl_pwm_calculate_duty()
198 duty = (unsigned long long)duty_ns * period; in fsl_pwm_calculate_duty()
238 if (!fsl_pwm_calculate_period(fpc, newstate->period, &periodcfg)) { in fsl_pwm_apply_config()
239 dev_err(fpc->chip.dev, "failed to calculate new period\n"); in fsl_pwm_apply_config()
246 * The Freescale FTM controller supports only a single period for in fsl_pwm_apply_config()
247 * all PWM channels, therefore verify if the newly computed period in fsl_pwm_apply_config()
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Dpwm-mtk-disp.c75 u32 clk_div, period, high_width, value; in mtk_disp_pwm_apply() local
113 * Find period, high_width and clk_div to suit duty_ns and period_ns. in mtk_disp_pwm_apply()
114 * Calculate proper div value to keep period value in the bound. in mtk_disp_pwm_apply()
116 * period_ns = 10^9 * (clk_div + 1) * (period + 1) / PWM_CLK_RATE in mtk_disp_pwm_apply()
119 * period = (PWM_CLK_RATE * period_ns) / (10^9 * (clk_div + 1)) - 1 in mtk_disp_pwm_apply()
123 clk_div = mul_u64_u64_div_u64(state->period, rate, NSEC_PER_SEC) >> in mtk_disp_pwm_apply()
134 period = mul_u64_u64_div_u64(state->period, rate, div); in mtk_disp_pwm_apply()
135 if (period > 0) in mtk_disp_pwm_apply()
136 period--; in mtk_disp_pwm_apply()
139 value = period | (high_width << PWM_HIGH_WIDTH_SHIFT); in mtk_disp_pwm_apply()
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/Linux-v6.1/Documentation/RCU/Design/Expedited-Grace-Periods/
DExpedited-Grace-Periods.rst17 Expedited Grace Period Design
23 grace period.
32 state, the expedited grace period has completed.
43 expedited grace period is shown in the following diagram:
54 Otherwise, the expedited grace period will use
72 block the current expedited grace period until it resumes and finds its
75 the CPU is no longer blocking the grace period.
86 | Why not just have the expedited grace period check the state of all |
116 the handling of a given CPU by an RCU-sched expedited grace period is
137 Expedited Grace Period and CPU Hotplug
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/Linux-v6.1/Documentation/RCU/Design/Memory-Ordering/
DTree-RCU-Memory-Ordering.rst2 A Tour Through TREE_RCU's Grace-Period Memory Ordering
13 grace-period memory ordering guarantee is provided.
15 What Is Tree RCU's Grace Period Memory Ordering Guarantee?
20 Any code that happens after the end of a given RCU grace period is guaranteed
22 period that are within RCU read-side critical sections.
24 period is guaranteed to not see the effects of all accesses following the end
25 of that grace period that are within RCU read-side critical sections.
34 two phases, one of which is executed before the grace period and
35 the other of which is executed after the grace period.
46 Tree RCU Grace Period Memory Ordering Building Blocks
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/Linux-v6.1/Documentation/RCU/
Dstallwarn.rst40 - Anything that prevents RCU's grace-period kthreads from running.
51 in which case the next RCU grace period can never complete, which
119 RCU only detects CPU stalls when there is a grace period in progress.
120 No grace period, no CPU stall warnings.
148 This kernel configuration parameter defines the period of time
149 that RCU will wait from the beginning of a grace period until it
150 issues an RCU CPU stall warning. This time period is normally
169 the expedited grace period. This parameter defines the period
171 grace period until it issues an RCU CPU stall warning. This time
172 period is normally 20 milliseconds on Android devices. A zero
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/Linux-v6.1/include/linux/
Dflex_proportions.h3 * Floating proportions with flexible aging period
19 * bound on the number of events per period like
29 /* Number of events in the current period */
31 /* Current period */
32 unsigned int period; member
33 /* Synchronization with period transitions */
47 /* Period in which we last updated events */
48 unsigned int period; member
49 raw_spinlock_t lock; /* Protect period and numerator */
79 /* Period in which we last updated events */
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Dpwm.h15 * period
18 * period
27 * @period: reference period
39 u64 period; member
50 * @period: PWM period (in nanoseconds)
60 u64 period; member
117 static inline void pwm_set_period(struct pwm_device *pwm, u64 period) in pwm_set_period() argument
120 pwm->state.period = period; in pwm_set_period()
129 return state.period; in pwm_get_period()
169 * that first retrieves the current PWM state and the replaces the period
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/Linux-v6.1/Documentation/scheduler/
Dsched-bwc.rst12 The bandwidth allowed for a group is specified using a quota and period. Within
13 each given "period" (microseconds), a task group is allocated up to "quota"
18 period when the quota is replenished.
21 cfs_quota units at each period boundary. As threads consume this bandwidth it
70 Quota, period and burst are managed within the cpu subsystem via cgroupfs.
77 - cpu.cfs_quota_us: run-time replenished within a period (in microseconds)
78 - cpu.cfs_period_us: the length of a period (in microseconds)
95 period is 1ms. There is also an upper bound on the period length of 1s.
155 a. it fully consumes its own quota within a period
156 b. a parent's quota is fully consumed within its period
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Dsched-rt-group.rst27 system when the period is smaller than either the available hrtimer
53 in a given period. We allocate this "run time" for each realtime group which
61 frames a second, which yields a period of 0.04s per frame. Now say it will also
66 This way the graphics group will have a 0.04s period with a 0.032s run time
69 0.00015s. So this group can be scheduled with a period of 0.005s and a run time
90 The scheduling period that is equivalent to 100% CPU bandwidth
102 * A run time of -1 specifies runtime == period, ie. no limit.
115 period from /proc/sys/kernel/sched_rt_period_us and a run time of 0. If you
151 There is work in progress to make the scheduling period for each group
154 The constraint on the period is that a subgroup must have a smaller or
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/Linux-v6.1/drivers/watchdog/
Dbooke_wdt.c22 * Also, the wdt_period sets the watchdog timer period timeout.
50 /* For the specified period, determine the number of seconds
55 * 2.5 * (2^(63-period+1)) / timebase_freq
57 * In order to simplify things, we assume that period is
60 static unsigned long long period_to_sec(unsigned int period) in period_to_sec() argument
62 unsigned long long tmp = 1ULL << (64 - period); in period_to_sec()
75 * This procedure will find the highest period which will give a timeout
81 unsigned int period; in sec_to_period() local
82 for (period = 63; period > 0; period--) { in sec_to_period()
83 if (period_to_sec(period) >= secs) in sec_to_period()
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/Linux-v6.1/Documentation/devicetree/bindings/input/
Drotary-encoder.txt17 - rotary-encoder,steps-per-period: Number of steps (stable states) per period.
19 1: Full-period mode (default)
20 2: Half-period mode
21 4: Quarter-period mode
27 - rotary-encoder,half-period: Makes the driver work on half-period mode.
28 This property is deprecated. Instead, a 'steps-per-period ' value should
29 be used, such as "rotary-encoder,steps-per-period = <2>".
/Linux-v6.1/arch/m68k/amiga/
Damisound.c29 * The minimum period for audio may be modified by the frame buffer
40 * Current period (set by dmasound.c)
82 unsigned long period = (clock_constant / hz); in amiga_mksound() local
84 if (period < amiga_audio_min_period) in amiga_mksound()
85 period = amiga_audio_min_period; in amiga_mksound()
86 if (period > MAX_PERIOD) in amiga_mksound()
87 period = MAX_PERIOD; in amiga_mksound()
89 /* setup pointer to data, period, length and volume */ in amiga_mksound()
92 custom.aud[2].audper = (unsigned short)period; in amiga_mksound()
114 /* restore period to previous value after beeping */ in nosound()
/Linux-v6.1/drivers/media/cec/core/
Dcec-pin-priv.h42 /* Generate a start bit period that is too short */
44 /* Generate a start bit period that is too long */
54 /* Generate a bit period that is too short */
56 /* Generate a bit period that is too long */
62 /* Generate a bit period that is too short */
64 /* Generate a bit period that is too long */
71 /* Wait for end of bit period after sampling */
73 /* Generate a bit period that is too short */
75 /* Generate a bit period that is too long */
96 /* Wait for earliest end of bit period after sampling */
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/Linux-v6.1/kernel/rcu/
Dtree_exp.h16 * Record the start of an expedited grace period.
25 * Return the value that the expedited-grace-period counter will have
26 * at the end of the current grace period.
34 * Record the end of an expedited grace period.
44 * Take a snapshot of the expedited-grace-period counter, which is the
45 * earliest value that will indicate that a full grace period has
60 * if a full expedited grace period has elapsed since that snapshot
130 * a new expedited grace period.
147 * Return non-zero if there is no RCU expedited grace period in progress
150 * for the current expedited grace period.
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/Linux-v6.1/tools/perf/tests/
Dhists_output.c54 struct perf_sample sample = { .period = 100, }; in add_hist_entries()
170 !strcmp(SYM(he), "main") && he->stat.period == 200); in test1()
176 !strcmp(SYM(he), "page_fault") && he->stat.period == 100); in test1()
182 !strcmp(SYM(he), "main") && he->stat.period == 100); in test1()
188 !strcmp(SYM(he), "xmalloc") && he->stat.period == 100); in test1()
194 !strcmp(SYM(he), "page_fault") && he->stat.period == 100); in test1()
200 !strcmp(SYM(he), "schedule") && he->stat.period == 100); in test1()
206 !strcmp(SYM(he), "free") && he->stat.period == 100); in test1()
212 !strcmp(SYM(he), "malloc") && he->stat.period == 100); in test1()
218 !strcmp(SYM(he), "cmd_record") && he->stat.period == 100); in test1()
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/Linux-v6.1/drivers/net/wireless/mediatek/mt76/
Dmt76x02_dfs.c256 /* reported period */ in mt76x02_dfs_get_hw_pulse()
257 pulse->period = mt76_rr(dev, MT_BBP(DFS, 19)); in mt76x02_dfs_get_hw_pulse()
272 if (!pulse->period || !pulse->w1) in mt76x02_dfs_check_hw_pulse()
287 ret = (pulse->period >= 2900 && in mt76x02_dfs_check_hw_pulse()
288 (pulse->period <= 4700 || in mt76x02_dfs_check_hw_pulse()
289 pulse->period >= 6400) && in mt76x02_dfs_check_hw_pulse()
290 (pulse->period <= 6800 || in mt76x02_dfs_check_hw_pulse()
291 pulse->period >= 10200) && in mt76x02_dfs_check_hw_pulse()
292 pulse->period <= 61600); in mt76x02_dfs_check_hw_pulse()
294 ret = (pulse->period >= 2900 && in mt76x02_dfs_check_hw_pulse()
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