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/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
11 SiFive SoCs and other RISC-V SoCs include an implementation of the
12 Platform-Level Interrupt Controller (PLIC) high-level specification in
13 the RISC-V Privileged Architecture specification. The PLIC connects all
14 external interrupts in the system to all hart contexts in the system, via
15 the external interrupt source in each hart.
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/Linux-v6.1/arch/riscv/kernel/
Dcpu.c1 // SPDX-License-Identifier: GPL-2.0-only
17 * Returns the hart ID of the given device tree node, or -ENODEV if the node
18 * isn't an enabled and valid RISC-V hart node.
20 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart) in riscv_of_processor_hartid() argument
26 return -ENODEV; in riscv_of_processor_hartid()
29 *hart = (unsigned long) of_get_cpu_hwid(node, 0); in riscv_of_processor_hartid()
30 if (*hart == ~0UL) { in riscv_of_processor_hartid()
31 pr_warn("Found CPU without hart ID\n"); in riscv_of_processor_hartid()
32 return -ENODEV; in riscv_of_processor_hartid()
36 pr_info("CPU with hartid=%lu is not available\n", *hart); in riscv_of_processor_hartid()
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Dkexec_relocate.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019 FORTH-ICS/CARV
19 * s3: (const) The hartid of the current hart
21 * s5: (const) Number of words per page
63 REG_L t0, 0(s0) /* t0 = *image->entry */
64 addi s0, s0, RISCV_SZPTR /* image->entry++ */
66 /* IND_DESTINATION entry ? -> save destination address */
73 /* IND_INDIRECTION entry ? -> update next entry ptr (PA) */
82 /* IND_DONE entry ? -> jump to done label */
89 * IND_SOURCE entry ? -> copy page word by word to the
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Dentry.S1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <asm/asm-offsets.h>
35 addi sp, sp, -(PT_SIZE_ON_STACK)
45 addi sp, sp, -(PT_SIZE_ON_STACK)
77 * Disable user-mode memory access as it should only be set in the
172 * When running is M-Mode (no MMU config), MPIE does not get set.
180 /* Recover a0 - a7 for system calls */
268 REG_L s0, TASK_TI_FLAGS(tp) /* current_thread_info->flags */
301 * different hart contexts. We can't actually save and restore a load
302 * reservation, so instead here we clear any existing reservation --
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/Linux-v6.1/drivers/irqchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
118 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
126 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
213 bool "J-Core integrated AIC" if COMPILE_TEST
217 Support for the J-Core integrated AIC.
228 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
231 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
236 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
286 tristate "TS-4800 IRQ controller"
291 Support for the TS-4800 FPGA IRQ controller
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/Linux-v6.1/Documentation/devicetree/bindings/timer/
Dsifive,clint.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Palmer Dabbelt <palmer@dabbelt.com>
11 - Anup Patel <anup.patel@wdc.com>
14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive
15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
16 interrupts. It directly connects to the timer and inter-processor interrupt
17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
19 The clock frequency of CLINT is specified via "timebase-frequency" DT
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/Linux-v6.1/drivers/cpuidle/
Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
51 data->available = true; in sbi_set_domain_state()
52 data->state = state; in sbi_set_domain_state()
59 return data->state; in sbi_get_domain_state()
66 data->available = false; in sbi_clear_domain_state()
73 return data->available; in sbi_is_domain_state_available()
114 u32 *states = data->states; in __sbi_enter_domain_idle_state()
115 struct device *pd_dev = data->dev; in __sbi_enter_domain_idle_state()
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/Linux-v6.1/Documentation/devicetree/bindings/iio/temperature/
Dadi,ltc2983.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC2983 Multi-sensor Temperature system
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System
14 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
19 - adi,ltc2983
27 adi,mux-delay-config-us:
29 The LTC2983 performs 2 or 3 internal conversion cycles per temperature
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/Linux-v6.1/Documentation/timers/
Dhighres.rst8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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/Linux-v6.1/drivers/clocksource/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
203 32-bit free running decrementing counters.
238 bool "Integrator-AP timer driver" if COMPILE_TEST
241 Enables support for the Integrator-AP timer.
266 available on many OMAP-like platforms.
285 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
289 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
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/Linux-v6.1/Documentation/RCU/
DRTFP.txt4 This document describes RCU-related publications, and is followed by
19 with short-lived threads, such as the K42 research operating system.
20 However, Linux has long-lived tasks, so more is needed.
23 serialization, which is an RCU-like mechanism that relies on the presence
27 that these overheads were not so expensive in the mid-80s. Nonetheless,
28 passive serialization appears to be the first deferred-destruction
30 has lapsed, so this approach may be used in non-GPL software, if desired.
34 In 1987, Rashid et al. described lazy TLB-flush [RichardRashid87a].
36 this paper helped inspire the update-side batching used in the later
38 a description of Argus that noted that use of out-of-date values can
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/Linux-v6.1/drivers/platform/x86/
Dwmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ACPI-WMI mapping driver
5 * Copyright (C) 2007-2008 Carlos Corbacho <carlos@strangeworlds.co.uk>
9 * Copyright (c) 2001-2007 Anton Altaparmakov
12 * WMI bus infrastructure by Andrew Lutomirski and Darren Hart:
39 MODULE_DESCRIPTION("ACPI-WMI Mapping Driver");
107 "05901221-D566-11D1-B2F0-00A0C9062910", /* wmi-bmof */
127 if (guid_equal(&wblock->gblock.guid, &guid_input)) { in find_guid()
143 id = wdriver->id_table; in find_guid_context()
147 while (*id->guid_string) { in find_guid_context()
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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