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/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,pch-pic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson PCH PIC Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson LS7A family of PCH for
14 transforming interrupts from on-chip devices into HyperTransport vectorized
19 const: loongson,pch-pic-1.0
22 maxItems: 1
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Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
17 interrupts from PCH PIC connected on HyperTransport bus.
21 const: loongson,htpic-1.0
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/Linux-v6.1/Documentation/translations/zh_CN/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/loongarch/irq-chip-model.rst
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
27 CPU串口（UARTs）中断发送到LIOINTC，而其他所有设备的中断则分别发送到所连接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
30 +-----+ +---------+ +-------+
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/Linux-v6.1/Documentation/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together
10 I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller),
11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
27 +-----+ +---------+ +-------+
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/Linux-v6.1/drivers/irqchip/
Dirq-loongson-pch-pic.c1 // SPDX-License-Identifier: GPL-2.0
4 * Loongson PCH PIC support
7 #define pr_fmt(fmt) "pch-pic: " fmt
54 void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4; in pch_pic_bitset()
56 raw_spin_lock(&priv->pic_lock); in pch_pic_bitset()
60 raw_spin_unlock(&priv->pic_lock); in pch_pic_bitset()
66 void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4; in pch_pic_bitclr()
68 raw_spin_lock(&priv->pic_lock); in pch_pic_bitclr()
72 raw_spin_unlock(&priv->pic_lock); in pch_pic_bitclr()
79 pch_pic_bitset(priv, PCH_PIC_MASK, d->hwirq); in pch_pic_mask_irq()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 default 1
118 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
126 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
213 bool "J-Core integrated AIC" if COMPILE_TEST
217 Support for the J-Core integrated AIC.
228 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
231 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
236 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
286 tristate "TS-4800 IRQ controller"
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/Linux-v6.1/arch/mips/boot/dts/loongson/
Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 pch: bus@10000000 { label
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 { label
14 compatible = "loongson,pch-pic-1.0";
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
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/Linux-v6.1/drivers/pci/
Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
64 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
65 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
66 (f->vendor == dev->vendor || in pci_do_fixups()
67 f->vendor == (u16) PCI_ANY_ID) && in pci_do_fixups()
68 (f->device == dev->device || in pci_do_fixups()
69 f->device == (u16) PCI_ANY_ID)) { in pci_do_fixups()
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/Linux-v6.1/arch/x86/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
27 # Options that are inherently 64-bit kernel only:
53 # ported to 32-bit as well. )
134 # Word-size accesses may read uninitialized data past the trailing \0
302 default "elf32-i386" if X86_32
303 default "elf64-x86-64" if X86_64
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
11 1. Always *test* your changes, however small, on at least 4 or
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
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