| /Linux-v6.1/fs/verity/ |
| D | verify.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Data verification functions, i.e. hooks for ->readahead()
17 * hash_at_level() - compute the location of the block's hash at the given level
21 * @level: (in) the level of hash we want (0 is leaf level)
26 pgoff_t dindex, unsigned int level, pgoff_t *hindex, in hash_at_level() argument
31 /* Offset of the hash within the level's region, in hashes */ in hash_at_level()
32 position = dindex >> (level * params->log_arity); in hash_at_level()
35 *hindex = params->level_start[level] + (position >> params->log_arity); in hash_at_level()
38 *hoffset = (position & ((1 << params->log_arity) - 1)) << in hash_at_level()
39 (params->log_blocksize - params->log_arity); in hash_at_level()
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| /Linux-v6.1/arch/x86/kvm/mmu/ |
| D | tdp_iter.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * Recalculates the pointer to the SPTE for the current GFN and level and
13 iter->sptep = iter->pt_path[iter->level - 1] + in tdp_iter_refresh_sptep()
14 SPTE_INDEX(iter->gfn << PAGE_SHIFT, iter->level); in tdp_iter_refresh_sptep()
15 iter->old_spte = kvm_tdp_mmu_read_spte(iter->sptep); in tdp_iter_refresh_sptep()
18 static gfn_t round_gfn_for_level(gfn_t gfn, int level) in round_gfn_for_level() argument
20 return gfn & -KVM_PAGES_PER_HPAGE(level); in round_gfn_for_level()
29 iter->yielded = false; in tdp_iter_restart()
30 iter->yielded_gfn = iter->next_last_level_gfn; in tdp_iter_restart()
31 iter->level = iter->root_level; in tdp_iter_restart()
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| D | paging_tmpl.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
19 * The MMU needs to be able to access/walk 32-bit and 64-bit guest page tables,
21 * once per guest PTE type. The per-type defines are #undef'd at the end.
50 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
58 #define PT_HAVE_ACCESSED_DIRTY(mmu) (!(mmu)->cpu_role.base.ad_disabled)
64 /* Common logic, but per-type values. These also need to be undefined. */
65 #define PT_BASE_ADDR_MASK ((pt_element_t)(((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)))
77 * The guest_walker structure emulates the behavior of the hardware page
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| D | tdp_mmu.c | 1 // SPDX-License-Identifier: GPL-2.0
26 return -ENOMEM; in kvm_mmu_init_tdp_mmu()
29 kvm->arch.tdp_mmu_enabled = true; in kvm_mmu_init_tdp_mmu()
30 INIT_LIST_HEAD(&kvm->arch.tdp_mmu_roots); in kvm_mmu_init_tdp_mmu()
31 spin_lock_init(&kvm->arch.tdp_mmu_pages_lock); in kvm_mmu_init_tdp_mmu()
32 INIT_LIST_HEAD(&kvm->arch.tdp_mmu_pages); in kvm_mmu_init_tdp_mmu()
33 kvm->arch.tdp_mmu_zap_wq = wq; in kvm_mmu_init_tdp_mmu()
42 lockdep_assert_held_read(&kvm->mmu_lock); in kvm_lockdep_assert_mmu_lock_held()
44 lockdep_assert_held_write(&kvm->mmu_lock); in kvm_lockdep_assert_mmu_lock_held()
51 if (!kvm->arch.tdp_mmu_enabled) in kvm_mmu_uninit_tdp_mmu()
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| D | mmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
47 #include <asm/page.h>
58 int __read_mostly nx_huge_pages = -1;
93 * When setting this variable to true it enables Two-Dimensional-Paging
94 * where the hardware walks 2 page tables:
95 * 1. the guest-virtual to guest-physical
96 * 2. while doing 1. it walks guest-physical to host-physical
136 int level; member
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| /Linux-v6.1/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| D | cache.json | 78 …"PublicDescription": "Level 2 access to data TLB that caused a page table walk. This event counts …
84 …"PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event …
108 "PublicDescription": "Level 1 data cache late miss",
114 "PublicDescription": "Level 1 data cache prefetch request",
120 "PublicDescription": "Level 2 data cache prefetch request",
126 "PublicDescription": "Level 1 stage 2 TLB refill",
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
135 "BriefDescription": "Page walk, L0 stage-1 hit"
138 "PublicDescription": "Page walk cache level-1 stage-1 hit",
141 "BriefDescription": "Page walk, L1 stage-1 hit"
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| /Linux-v6.1/include/asm-generic/ |
| D | pgalloc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 * __pte_alloc_one_kernel - allocate a page for PTE-level kernel page table
15 * anything beyond simple page allocation.
26 * pte_alloc_one_kernel - allocate a page for PTE-level kernel page table
38 * pte_free_kernel - free PTE-level kernel page table page
40 * @pte: pointer to the memory containing the page table
48 * __pte_alloc_one - allocate a page for PTE-level user page table
52 * Allocates a page and runs the pgtable_pte_page_ctor().
55 * anything beyond simple page allocation or must have custom GFP flags.
57 * Return: `struct page` initialized as page table or %NULL on error
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| /Linux-v6.1/arch/arm64/include/asm/ |
| D | kvm_pgtable.h | 1 // SPDX-License-Identifier: GPL-2.0-only
17 * The largest supported block sizes for KVM (no 52-bit PA support):
18 * - 4K (level 1): 1GB
19 * - 16K (level 2): 32MB
20 * - 64K (level 2): 512MB
60 static inline u64 kvm_granule_shift(u32 level) in kvm_granule_shift() argument
63 return ARM64_HW_PGTABLE_LEVEL_SHIFT(level); in kvm_granule_shift()
66 static inline u64 kvm_granule_size(u32 level) in kvm_granule_size() argument
68 return BIT(kvm_granule_shift(level)); in kvm_granule_size()
71 static inline bool kvm_level_supports_block_mapping(u32 level) in kvm_level_supports_block_mapping() argument
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| /Linux-v6.1/Documentation/virt/kvm/x86/ |
| D | mmu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 - correctness:
18 - security:
21 - performance:
23 - scaling:
25 - hardware:
27 - integration:
29 so that swapping, page migration, page merging, transparent
31 - dirty tracking:
33 and framebuffer-based displays
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| /Linux-v6.1/drivers/iommu/amd/ |
| D | io_pgtable_v2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * CPU-agnostic AMD IO page table v2 allocator.
10 #define pr_fmt(fmt) "AMD-Vi: " fmt
14 #include <linux/io-pgtable.h>
25 #define IOMMU_PAGE_PWT BIT_ULL(3) /* Page write through */
26 #define IOMMU_PAGE_PCD BIT_ULL(4) /* Page cache disabled */
29 #define IOMMU_PAGE_PSE BIT_ULL(7) /* Page Size Extensions */
40 /* 5 level page table is not supported */ in get_pgtable_level()
54 static inline u64 set_pgtable_attr(u64 *page) in set_pgtable_attr() argument
61 return (iommu_virt_to_phys(page) | prot); in set_pgtable_attr()
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| /Linux-v6.1/fs/f2fs/ |
| D | dir.c | 1 // SPDX-License-Identifier: GPL-2.0
25 return ((unsigned long long) (i_size_read(inode) + PAGE_SIZE - 1)) in dir_blocks()
29 static unsigned int dir_buckets(unsigned int level, int dir_level) in dir_buckets() argument
31 if (level + dir_level < MAX_DIR_HASH_DEPTH / 2) in dir_buckets()
32 return 1 << (level + dir_level); in dir_buckets()
37 static unsigned int bucket_blocks(unsigned int level) in bucket_blocks() argument
39 if (level < MAX_DIR_HASH_DEPTH / 2) in bucket_blocks()
68 de->file_type = f2fs_type_by_mode[(mode & S_IFMT) >> S_SHIFT]; in set_de_type()
73 if (de->file_type < F2FS_FT_MAX) in f2fs_get_de_type()
74 return f2fs_filetype_table[de->file_type]; in f2fs_get_de_type()
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| /Linux-v6.1/arch/powerpc/include/asm/nohash/64/ |
| D | pgtable-4k.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm-generic/pgtable-nop4d.h>
8 * Entries per page directory level. The PTE level must use a 64b record
9 * for each page table entry. The PMD and PGD level use a 32b record for
10 * each entry by assuming that each entry is page aligned.
29 /* PMD_SHIFT determines what a second-level page table entry can map */
32 #define PMD_MASK (~(PMD_SIZE-1))
34 /* PUD_SHIFT determines what a third-level page table entry can map */
37 #define PUD_MASK (~(PUD_SIZE-1))
39 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
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| /Linux-v6.1/arch/x86/mm/ |
| D | mem_encrypt_amd.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/dma-direct.h>
21 #include <linux/dma-mapping.h>
33 #include <asm/processor-flags.h>
50 /* Buffer used for early in-place encryption by BSP, no locking needed */
54 * SNP-specific routine which needs to additionally change the page state from
65 * @paddr needs to be accessed decrypted, mark the page shared in in snp_memcpy()
72 /* Restore the page state after the memcpy. */ in snp_memcpy()
76 * @paddr need to be accessed encrypted, no need for the page state in snp_memcpy()
85 * page(s) that map this memory. It assumes that eventually the memory is
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| /Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vm_pt.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
31 * amdgpu_vm_pt_cursor - state for for_each_amdgpu_vm_pt
37 unsigned int level; member
41 * amdgpu_vm_pt_level_shift - return the addr shift for each level
44 * @level: VMPT level
47 * The number of bits the pfn needs to be right shifted for a level.
50 unsigned int level) in amdgpu_vm_pt_level_shift() argument
52 switch (level) { in amdgpu_vm_pt_level_shift()
56 return 9 * (AMDGPU_VM_PDB0 - level) + in amdgpu_vm_pt_level_shift()
57 adev->vm_manager.block_size; in amdgpu_vm_pt_level_shift()
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| /Linux-v6.1/arch/arc/include/asm/ |
| D | pgtable-levels.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * 2 level paging setup for software walked MMUv3 (ARC700) and MMUv4 (HS)
19 * -------------------------------------------------------
20 * | | <---------- PGDIR_SHIFT ----------> |
21 * | | | <-- PAGE_SHIFT --> |
22 * -------------------------------------------------------
24 * | | --> off in page frame
25 * | ---> index into Page Table
26 * ----> index into Page Directory
29 * However enabling of super page in a 2 level regime pegs PGDIR_SHIFT to
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| /Linux-v6.1/Documentation/mm/ |
| D | vmemmap_dedup.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 The ``struct page`` structures are used to describe a physical page frame. By
13 default, there is a one-to-one mapping from a page frame to it's corresponding
14 ``struct page``.
16 HugeTLB pages consist of multiple base page size pages and is supported by many
17 architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
18 details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
19 currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
20 consists of 512 base pages and a 1GB HugeTLB page consists of 4096 base pages.
21 For each base page, there is a corresponding ``struct page``.
[all …]
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| /Linux-v6.1/tools/perf/pmu-events/arch/powerpc/power9/ |
| D | marked.json | 10 …"BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond …
20 … Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same …
45 …efDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L2 d…
50 …efDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L3 d…
60 …iption": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marke…
70 …Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the sa…
95 …Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the …
100 …Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the sa…
140 …"BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the loc…
170 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without d…
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| /Linux-v6.1/arch/x86/mm/pat/ |
| D | set_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-only
33 #include <asm/hyperv-tlfs.h>
39 * The current flushing context - we pass it instead of 5 arguments:
53 struct page **pages;
67 * entries change the page attribute in parallel to some other cpu
68 * splitting a large page entry along with changing the attribute.
85 void update_page_count(int level, unsigned long pages) in update_page_count() argument
89 direct_pages_count[level] += pages; in update_page_count()
93 static void split_page_count(int level) in split_page_count() argument
95 if (direct_pages_count[level] == 0) in split_page_count()
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| /Linux-v6.1/arch/mips/include/asm/ |
| D | pgtable-64.h | 16 #include <asm/page.h>
21 #include <asm-generic/pgtable-nopmd.h>
23 #include <asm-generic/pgtable-nopud.h>
25 #include <asm-generic/pgtable-nop4d.h>
29 * Each address space has 2 4K pages as its page directory, giving 1024
31 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
32 * tables. Each page table is also a single 4K page, giving 512 (==
39 * fault address - VMALLOC_START.
43 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)
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| /Linux-v6.1/arch/arm/include/asm/ |
| D | pgtable-2level.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/pgtable-2level.h
5 * Copyright (C) 1995-2002 Russell King
13 * Hardware-wise, we have a two level page table structure, where the first
14 * level has 4096 entries, and the second level has 256 entries. Each entry
15 * is one 32-bit word. Most of the bits in the second level entry are used
18 * Linux on the other hand has a three level page table structure, which can
19 * be wrapped to fit a two level page table structure easily - using the PGD
20 * and PTE only. However, Linux also expects one "PTE" table per page, and
23 * Therefore, we tweak the implementation slightly - we tell Linux that we
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| /Linux-v6.1/arch/x86/boot/compressed/ |
| D | pgtable_64.c | 1 // SPDX-License-Identifier: GPL-2.0
55 * Only look for values in the legacy ROM for non-EFI system. in find_trampoline_placement()
57 signature = (char *)&boot_params->efi_info.efi_loader_signature; in find_trampoline_placement()
73 for (i = boot_params->e820_entries - 1; i >= 0; i--) { in find_trampoline_placement()
76 entry = &boot_params->e820_table[i]; in find_trampoline_placement()
79 if (bios_start <= entry->addr) in find_trampoline_placement()
82 /* Skip non-RAM entries. */ in find_trampoline_placement()
83 if (entry->type != E820_TYPE_RAM) in find_trampoline_placement()
87 if (bios_start > entry->addr + entry->size) in find_trampoline_placement()
88 new = entry->addr + entry->size; in find_trampoline_placement()
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| /Linux-v6.1/tools/perf/pmu-events/arch/x86/snowridgex/ |
| D | virtual-memory.json | 3 …"BriefDescription": "Counts the number of page walks due to loads that miss the PDE (Page Director…
14 …the number of first level TLB misses but second level hits due to a demand load that did not start…
25 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page…
31 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
36 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 1G pag…
43 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
48 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 2M or …
55 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
60 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K pag…
67 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
[all …]
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| /Linux-v6.1/tools/perf/pmu-events/arch/x86/elkhartlake/ |
| D | virtual-memory.json | 3 …"BriefDescription": "Counts the number of page walks due to loads that miss the PDE (Page Director…
14 …the number of first level TLB misses but second level hits due to a demand load that did not start…
25 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page…
31 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
36 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 1G pag…
43 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
48 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 2M or …
55 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
60 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K pag…
67 …page walks completed due to loads (including SW prefetches) whose address translations missed in a…
[all …]
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| /Linux-v6.1/arch/hexagon/include/asm/ |
| D | vm_mmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Hexagon VM page table entry definitions
5 * Copyright (c) 2010-2011,2013 The Linux Foundation. All rights reserved.
13 * page tables.
15 * Virtual machine MMU allows first-level entries to either be
16 * single-level lookup PTEs for very large pages, or PDEs pointing
17 * to second-level PTEs for smaller pages. If PTE is single-level,
19 * virtual memory subsystem information about the page, and that state
23 /* S or Page Size field in PDE */
34 /* Masks for L2 page table pointer, as function of page size */
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| /Linux-v6.1/arch/ia64/include/asm/ |
| D | pgtable.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 * the IA-64 page table tree.
9 * This hopefully works with any (fixed) IA-64 page-size, as defined
10 * in <asm/page.h>.
12 * Copyright (C) 1998-2005 Hewlett-Packard Co
13 * David Mosberger-Tang <davidm@hpl.hp.com>
18 #include <asm/page.h>
33 #define _PAGE_P (1 << _PAGE_P_BIT) /* page present bit */
38 #define _PAGE_MA_NAT (0x7 << 2) /* not-a-thing attribute */
40 #define _PAGE_PL_0 (0 << 7) /* privilege level 0 (kernel) */
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