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/Linux-v6.1/arch/hexagon/mm/
Dcopy_user_template.S19 p0 = cmp.gtu(bytes,#0) define
20 if (!p0.new) jump:nt .Ldone
26 p0 = bitsclr(r3,#7) define
27 if (!p0.new) jump:nt .Loop_not_aligned_8
52 p0 = bitsclr(r4,#7) define
53 if (p0.new) jump:nt .Lalign
56 p0 = bitsclr(r3,#3) define
57 if (!p0.new) jump:nt .Loop_not_aligned_4
82 p0 = bitsclr(r3,#1) define
83 if (!p0.new) jump:nt .Loop_not_aligned
[all …]
/Linux-v6.1/arch/hexagon/lib/
Dmemset.S29 p0 = cmp.eq(r2, #0) define
36 if p0 jumpr r31 /* count == 0, so return */
41 p0 = tstbit(r9, #0) define
58 p0 = tstbit(r9, #1) define
60 if !p0 jump 3f /* skip initial byte store */
71 p0 = tstbit(r9, #2) define
73 if !p0 jump 4f /* skip initial half store */
84 p0 = cmp.gtu(r2, #7) define
86 if !p0 jump 5f /* skip initial word store */
91 p0 = cmp.gtu(r2, #11) define
[all …]
Dmemcpy_likely_aligned.S10 p0 = bitsclr(r1,#7) define
11 p0 = bitsclr(r0,#7) define
12 if (p0.new) r5:4 = memd(r1)
13 if (p0.new) r7:6 = memd(r1+#8)
16 if (!p0) jump:nt .Lmemcpy_call
17 if (p0) r9:8 = memd(r1+#16)
18 if (p0) r11:10 = memd(r1+#24)
19 p0 = cmp.gtu(r2,#64) define
22 if (p0) jump:nt .Lmemcpy_call
23 if (!p0) memd(r0) = r5:4
[all …]
Ddivsi3.S10 p0 = cmp.gt(r0,#-1) define
15 p3 = xor(p0,p1)
18 p0 = cmp.gtu(r3,r2) define
26 r0 = mux(p0,#0,r0)
27 p0 = or(p0,p1) define
28 if (p0.new) jumpr:nt r31
35 p0 = cmp.gtu(r6,#4) define
39 if (!p0) r6 = #3
50 if (!p0.new) r0 = add(r0,r5)
51 if (!p0.new) r2 = sub(r2,r4)
[all …]
Dudivsi3.S13 p0 = cmp.gtu(r1,r0) define
19 if (p0) jumpr r31
28 p0 = cmp.gtu(r2,r1) define
29 if (!p0.new) r1 = sub(r1,r2)
30 if (!p0.new) r0 = add(r0,r3)
34 p0 = cmp.gtu(r2,r1) define
35 if (!p0.new) r0 = add(r0,r3)
Dumodsi3.S12 p0 = cmp.gtu(r1,r0) define
16 if (p0) jumpr r31
26 p0 = cmp.gtu(r2,r0) define
27 if (!p0.new) r0 = sub(r0,r2)
32 p0 = cmp.gtu(r2,r0) define
33 if (!p0.new) r0 = sub(r0,r1)
Dmodsi3.S17 p0 = cmp.gtu(r1,r2) define
21 if (p0) jumpr r31
32 p0 = cmp.gtu(r2,r0) define
33 if (!p0.new) r0 = sub(r0,r2)
38 p0 = cmp.gtu(r2,r0) define
39 if (!p0.new) r0 = sub(r0,r1)
/Linux-v6.1/arch/x86/include/asm/
Dxor_avx.h29 static void xor_avx_2(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_2() argument
42 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_2()
44 "=m" (p0[i / sizeof(*p0)])); \ in xor_avx_2()
49 p0 = (unsigned long *)((uintptr_t)p0 + 512); in xor_avx_2()
56 static void xor_avx_3(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_3() argument
72 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_3()
74 "=m" (p0[i / sizeof(*p0)])); \ in xor_avx_3()
79 p0 = (unsigned long *)((uintptr_t)p0 + 512); in xor_avx_3()
87 static void xor_avx_4(unsigned long bytes, unsigned long * __restrict p0, in xor_avx_4() argument
106 "m" (p0[i / sizeof(*p0)])); \ in xor_avx_4()
[all …]
/Linux-v6.1/scripts/coccinelle/misc/
Dminmax.cocci172 for p0 in p:
173 coccilib.report.print_report(p0, "WARNING opportunity for max()")
179 for p0 in p:
180 coccilib.org.print_todo(p0, "WARNING opportunity for max()")
186 for p0 in p:
187 coccilib.report.print_report(p0, "WARNING opportunity for max()")
193 for p0 in p:
194 coccilib.org.print_todo(p0, "WARNING opportunity for max()")
200 for p0 in p:
201 coccilib.report.print_report(p0, "WARNING opportunity for min()")
[all …]
Ddoubleinit.cocci19 position p0,p;
23 struct I s =@p0 { ..., .fld@p = E, ...};
27 position r.p0,p;
31 struct I s =@p0 { ..., .fld@p = E, ...};
34 p0 << r.p0;
41 cocci.print_main(fld,p0)
46 p0 << r.p0;
54 coccilib.report.print_report(p0[0],msg)
/Linux-v6.1/arch/hexagon/include/asm/
Dbitops.h39 " { P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n" in test_and_clear_bit()
41 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_clear_bit()
44 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_clear_bit()
63 " { P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n" in test_and_set_bit()
65 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_set_bit()
68 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_set_bit()
89 " { P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n" in test_and_change_bit()
91 " {if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n" in test_and_change_bit()
94 : "r10", "r11", "r12", "p0", "p1", "memory" in test_and_change_bit()
173 "{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n" in arch_test_bit()
[all …]
Dcmpxchg.h32 " memw_locked(%1,P0) = %2;\n" /* store into memory */ in __xchg()
33 " if (!P0) jump 1b;\n" in __xchg()
36 : "memory", "p0" in __xchg()
63 " { P0 = cmp.eq(%0,%2);\n" \
64 " if (!P0.new) jump:nt 2f; }\n" \
65 " memw_locked(%1,p0) = %3;\n" \
66 " if (!P0) jump 1b;\n" \
70 : "memory", "p0" \
Datomic.h21 " memw_locked(%0,p0) = %1;\n" in arch_atomic_set()
22 " if (!P0) jump 1b;\n" in arch_atomic_set()
25 : "memory", "p0", "r6" in arch_atomic_set()
70 " { P0 = cmp.eq(%0,%2);\n" in arch_atomic_cmpxchg()
71 " if (!P0.new) jump:nt 2f; }\n" in arch_atomic_cmpxchg()
72 " memw_locked(%1,P0) = %3;\n" in arch_atomic_cmpxchg()
73 " if (!P0) jump 1b;\n" in arch_atomic_cmpxchg()
77 : "memory", "p0" in arch_atomic_cmpxchg()
/Linux-v6.1/Documentation/devicetree/bindings/ata/
Dceva,ahci-1v84.yaml40 ceva,p0-cominit-params:
45 ceva,p0-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
52 ceva,p0-comwake-params:
57 ceva,p0-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
64 ceva,p0-burst-params:
69 ceva,p0-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
76 ceva,p0-retry-params:
81 ceva,p0-retry-params = /bits/ 16 <RIT RCT>;
152 - ceva,p0-cominit-params
153 - ceva,p0-comwake-params
[all …]
/Linux-v6.1/drivers/gpu/drm/omapdrm/
Dtcm.h52 struct tcm_pt p0; member
228 slice->p0.y != slice->p1.y && in tcm_slice()
229 (slice->p0.x || (slice->p1.x != slice->tcm->width - 1))) { in tcm_slice()
232 slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1; in tcm_slice()
234 parent->p0.x = 0; in tcm_slice()
235 parent->p0.y = slice->p1.y + 1; in tcm_slice()
249 area->p0.y <= area->p1.y && in tcm_area_is_valid()
250 /* 1D coordinate relationship + p0.x check */ in tcm_area_is_valid()
252 area->p0.x < area->tcm->width && in tcm_area_is_valid()
253 area->p0.x + area->p0.y * area->tcm->width <= in tcm_area_is_valid()
[all …]
Dtcm-sita.c163 area->p0.x = pos % tcm->width; in sita_reserve_1d()
164 area->p0.y = pos / tcm->width; in sita_reserve_1d()
185 area->p0.x = pos % tcm->width; in sita_reserve_2d()
186 area->p0.y = pos / tcm->width; in sita_reserve_2d()
187 area->p1.x = area->p0.x + w - 1; in sita_reserve_2d()
188 area->p1.y = area->p0.y + h - 1; in sita_reserve_2d()
205 pos = area->p0.x + area->p0.y * tcm->width; in sita_free()
207 w = area->p1.x - area->p0.x + 1; in sita_free()
208 h = area->p1.y - area->p0.y + 1; in sita_free()
/Linux-v6.1/arch/ia64/lib/
Dmemset.S69 cmp.eq p_scr, p0 = cnt, r0
81 cmp.ne p_unalgn, p0 = tmp, r0 //
84 cmp.gt p_scr, p0 = 16, cnt // is it a minimalistic task?
118 cmp.gt p_scr, p0 = tmp, cnt // is it a minimalistic task?
137 cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value
186 cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching?
194 cmp.le p_scr, p0 = 8, cnt // just a few bytes left ?
207 cmp.gt p_scr, p0 = PREF_AHEAD, linecnt // check against actual value
240 cmp.lt p_scr, p0 = ptr9, ptr1 // do we need more prefetching?
248 cmp.gt p_scr, p0 = 8, cnt // just a few bytes left ?
[all …]
Dmemcpy_mck.S95 cmp.gt p15,p0=8,in2 // check for small size
96 cmp.ne p13,p0=0,r28 // check dest alignment
97 cmp.ne p14,p0=0,r29 // check src alignment
104 cmp.le p6,p0 = 1,r30 // for .align_dest
119 cmp.lt p6,p0=2*PREFETCH_DIST,cnt
145 cmp.eq p10,p0=r29,r0 // do we really need to loop?
147 cmp.le p6,p0=8,tmp
149 cmp.le p7,p0=16,tmp
174 cmp.le p8,p0=24,tmp
218 cmp.eq p16, p0 = r0, r0 // reset p16 to 1
[all …]
Dclear_user.S60 cmp.eq p6,p0=r0,len // check for zero length
69 cmp.lt p6,p0=16,len // if len > 16 then long memset
104 tbit.nz p6,p0=buf,0 // odd alignment (for long_do_clear)
108 tbit.nz p6,p0=buf,1
112 tbit.nz p6,p0=buf,2
116 tbit.nz p6,p0=buf,3
122 cmp.eq p6,p0=r0,cnt
167 tbit.nz p6,p0=len,3
/Linux-v6.1/drivers/scsi/qla4xxx/
Dql4_dbg.c106 offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf), in qla4xxx_dump_registers()
107 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); in qla4xxx_dump_registers()
109 offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl), in qla4xxx_dump_registers()
110 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); in qla4xxx_dump_registers()
112 offsetof(struct isp_reg, u2.isp4022.p0.port_status), in qla4xxx_dump_registers()
113 readw(&ha->reg->u2.isp4022.p0.port_status)); in qla4xxx_dump_registers()
115 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out), in qla4xxx_dump_registers()
116 readw(&ha->reg->u2.isp4022.p0.gp_out)); in qla4xxx_dump_registers()
118 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in), in qla4xxx_dump_registers()
119 readw(&ha->reg->u2.isp4022.p0.gp_in)); in qla4xxx_dump_registers()
[all …]
/Linux-v6.1/tools/memory-model/Documentation/
Dexplanation.txt115 P0()
131 Here the P0() function represents the interrupt handler running on one
134 Thus, P0 stores the data in buf and then sets flag. Meanwhile, P1
162 instance, P1 might run entirely before P0 begins, in which case r1 and
163 r2 will both be 0 at the end. Or P0 might run entirely before P1
167 routines run concurrently. One possibility is that P1 runs after P0's
196 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from
202 P1 must load 0 from buf before P0 stores 1 to it; otherwise r2
206 P0 stores 1 to buf before storing 1 to flag, since it executes
209 Since an instruction (in this case, P0's store to flag) cannot
[all …]
/Linux-v6.1/tools/testing/selftests/bpf/prog_tests/
Dsockmap_listen.c946 int s, c0, c1, p0, p1; in redir_to_connected() local
971 p0 = xaccept_nonblock(s, NULL, NULL); in redir_to_connected()
972 if (p0 < 0) in redir_to_connected()
986 err = add_to_sockmap(sock_mapfd, p0, p1); in redir_to_connected()
1015 xclose(p0); in redir_to_connected()
1241 int s, c0, c1, p0, err; in test_reuseport_select_connected() local
1274 p0 = xaccept_nonblock(s, NULL, NULL); in test_reuseport_select_connected()
1275 if (p0 < 0) in test_reuseport_select_connected()
1278 p0 = xsocket(family, sotype, 0); in test_reuseport_select_connected()
1279 if (p0 < 0) in test_reuseport_select_connected()
[all …]
/Linux-v6.1/arch/ia64/kernel/
Dfsys.S89 cmp.ne p8,p0=0,r9
118 cmp.ne p8,p0=0,r9
146 tnat.nz p6,p0 = r33 // guard against NaT argument
195 tnat.nz p6,p0 = r31 // guard against Nat argument
210 cmp.ne p6, p0 = 0, r2 // Fallback if work is scheduled
230 (p8) cmp.ne p13,p0 = r2,r0 // need itc_jitter compensation, set p13
233 (p9) cmp.eq p13,p0 = 0,r30 // if mmio_ptr, clear p13 jitter control
252 (p7) cmp.ne p7,p0 = r25,r3 // if cmpxchg not successful
272 cmp4.ne p7,p0 = r28,r10
283 cmp.ge p6,p0 = r8,r2
[all …]
/Linux-v6.1/tools/memory-model/litmus-tests/
DREADME192 P0(int *x, int *y)
216 P0()'s WRITE_ONCE() is read by its first READ_ONCE(), which is a
217 reads-from link (rf) and internal to the P0() process. This is
223 P0()'s second access is a READ_ONCE(), as opposed to (for example)
226 P0()'s third access is also a READ_ONCE(), but to y rather than x.
227 This is related to P0()'s second access by program order ("po"),
229 The resulting descriptor is "PodRR". Because P0()'s third access is
232 A from-read ("fre") relation links P0()'s third to P1()'s first
237 The remainder of P1() is similar to P0(), which means we add
239 P0()'s first access, which is WRITE_ONCE(), so we add "Fre Once".
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/
Duncore-cpa.json40 "BriefDescription": "Number of write ops transmitted by the P0 port",
47 "BriefDescription": "Number of read ops transmitted by the P0 port",
54 "BriefDescription": "Number of read ops transmitted by the P0 port which size is 64 bytes",
61 "BriefDescription": "Number of read ops transmitted by the P0 port which size is 32 bytes",

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