| /Linux-v5.15/Documentation/devicetree/bindings/soundwire/ |
| D | qcom,sdw.txt | 7 - compatible:
10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>",
12 "qcom,soundwire-v1.3.0"
13 "qcom,soundwire-v1.5.0"
14 "qcom,soundwire-v1.5.1"
15 "qcom,soundwire-v1.6.0"
16 - reg:
18 Value type: <prop-encoded-array>
22 - interrupts:
24 Value type: <prop-encoded-array>
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| /Linux-v5.15/arch/arm64/boot/dts/hisilicon/ |
| D | hi3660-coresight.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
41 remote-endpoint =
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| D | hi6220-coresight.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
44 in-ports {
[all …]
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | hip04.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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| D | vexpress-v2p-ca15_a7.dts | 1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
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| /Linux-v5.15/drivers/thunderbolt/ |
| D | test.c | 1 // SPDX-License-Identifier: GPL-2.0
20 res->data = ida; in __ida_init()
26 struct ida *ida = res->data; in __ida_destroy()
47 sw->config.upstream_port_number = upstream_port; in alloc_switch()
48 sw->config.depth = tb_route_length(route); in alloc_switch()
49 sw->config.route_hi = upper_32_bits(route); in alloc_switch()
50 sw->config.route_lo = lower_32_bits(route); in alloc_switch()
51 sw->config.enabled = 0; in alloc_switch()
52 sw->config.max_port_number = max_port_number; in alloc_switch()
54 size = (sw->config.max_port_number + 1) * sizeof(*sw->ports); in alloc_switch()
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| /Linux-v5.15/arch/arm64/boot/dts/sprd/ |
| D | sc9863a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <0>;
17 cpu-map {
48 compatible = "arm,cortex-a55";
50 enable-method = "psci";
51 cpu-idle-states = <&CORE_PD>;
56 compatible = "arm,cortex-a55";
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| D | sc9860.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
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| D | sc9836.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
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| /Linux-v5.15/Documentation/devicetree/bindings/arm/ |
| D | coresight.txt | 11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
26 "arm,coresight-tmc", "arm,primecell";
28 - Trace Programmable Funnel:
29 "arm,coresight-dynamic-funnel", "arm,primecell";
[all …]
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| /Linux-v5.15/arch/arm64/boot/dts/arm/ |
| D | juno-cs-r1r2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
8 clock-names = "apb_pclk";
9 power-domains = <&scpi_devpd 0>;
10 out-ports {
13 remote-endpoint = <&etf1_in_port>;
17 in-ports {
27 compatible = "arm,coresight-tmc", "arm,primecell";
31 clock-names = "apb_pclk";
32 power-domains = <&scpi_devpd 0>;
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| D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 #mbox-cells = <1>;
32 clock-names = "apb_pclk";
[all …]
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| /Linux-v5.15/net/netfilter/ |
| D | nf_conntrack_sane.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * http://www.sane-project.org/html/doc015.html
11 * (C) 1999-2001 Paul `Rusty' Russell
12 * (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
13 * (C) 2003,2004 USAGI/WIDE Project <http://www.linux-ipv6.org>
42 static u_int16_t ports[MAX_PORTS]; variable
44 module_param_array(ports, ushort, &ports_c, 0400);
90 dataoff = protoff + th->doff * 4; in help()
91 if (dataoff >= skb->len) in help()
94 datalen = skb->len - dataoff; in help()
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| D | nf_nat_ftp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 /* (C) 1999-2001 Paul `Rusty' Russell
5 * (C) 2002-2006 Netfilter Core Team <coreteam@netfilter.org>
28 /* FIXME: Time out? --RR */
41 ((unsigned char *)&addr->ip)[0], in nf_nat_ftp_fmt_cmd()
42 ((unsigned char *)&addr->ip)[1], in nf_nat_ftp_fmt_cmd()
43 ((unsigned char *)&addr->ip)[2], in nf_nat_ftp_fmt_cmd()
44 ((unsigned char *)&addr->ip)[3], in nf_nat_ftp_fmt_cmd()
50 &addr->ip, port); in nf_nat_ftp_fmt_cmd()
53 &addr->ip6, port); in nf_nat_ftp_fmt_cmd()
[all …]
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| /Linux-v5.15/tools/testing/selftests/drivers/net/mlxsw/ |
| D | sharedbuffer_configuration.py | 2 # SPDX-License-Identifier: GPL-2.0
19 - random size
22 - random pool number
23 - random threshold
26 - random threshold
37 # For threshold of 16, this works out to be about 12MB on Spectrum-1,
38 # and about 17MB on Spectrum-2.
67 return arr[random.randint(0, len(arr) - 1)]
122 out = subprocess.check_output(cmd, shell=True)
124 return j.loads(out)
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| /Linux-v5.15/drivers/phy/tegra/ |
| D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
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| /Linux-v5.15/tools/perf/Documentation/ |
| D | perf-iostat.txt | 1 perf-iostat(1)
5 ----
6 perf-iostat - Show I/O performance metrics
9 --------
12 'perf iostat' <ports> \-- <command> [<options>]
15 -----------
18 - Inbound Read - I/O devices below root port read from the host memory, in MB
20 - Inbound Write - I/O devices below root port write to the host memory, in MB
22 - Outbound Read - CPU reads from I/O devices below root port, in MB
24 - Outbound Write - CPU writes to I/O devices below root port, in MB
[all …]
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| /Linux-v5.15/drivers/usb/gadget/function/ |
| D | u_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * u_serial.c - utilities for USB gadget "serial port"/TTY support
10 * Copyright (C) 1999 - 2002 Greg Kroah-Hartman (greg@kroah.com)
64 * gserial <---> gs_port ... links will be null when the USB link is
67 * gserial->ioport == usb_ep->driver_data ... gs_port
68 * gs_port->port_usb ... gserial
70 * gs_port <---> tty_struct ... links will be null when the TTY file
72 * gserial->port_tty ... tty_struct
73 * tty_struct->driver_data ... gserial
127 struct usb_cdc_line_coding port_line_coding; /* 8-N-1 etc */
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| /Linux-v5.15/Documentation/sound/cards/ |
| D | serial-u16550.rst | 7 * 0 - Roland Soundcanvas support (default)
8 * 1 - Midiator MS-124T support (1)
9 * 2 - Midiator MS-124W S/A mode (2)
10 * 3 - MS-124W M/B mode support (3)
11 * 4 - Generic device with multiple input support (4)
13 For the Midiator MS-124W, you must set the physical M-S and A-B
17 (midiCnD0-midiCnD15). Whenever you write to a different substream, the driver
28 /sbin/modprobe snd-serial-u16550 port=0x3f8 irq=4 speed=115200
30 Usage example for Roland SoundCanvas with 4 MIDI ports:
34 /sbin/modprobe snd-serial-u16550 port=0x3f8 irq=4 outs=4
[all …]
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| /Linux-v5.15/drivers/fpga/ |
| D | altera-fpga2sdram.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
12 * The bridge contains 4 read ports, 4 write ports, and 6 command ports.
13 * Reconfiguring these ports requires that no SDRAM transactions occur during
14 * reconfiguration. The code reconfiguring the ports cannot run out of SDRAM
16 * not support reconfiguring the ports. The ports are configured by code
17 * running out of on chip ram before Linux is started and the configuration
20 * This driver supports enabling and disabling of the configured ports, which
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
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| /Linux-v5.15/Documentation/networking/ |
| D | plip.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 -----------------
17 This device interface allows a point-to-point connection between two
18 parallel ports to appear as a IP network interface.
25 printer port. PLIP is a non-standard, but [can use] uses the standard
26 LapLink null-printer cable [can also work in turbo mode, with a PLIP
62 -------------------
66 share parallel ports between PLIP and other services.
77 On these machines, the PLIP driver can be used in IRQ-less mode, where
82 indicate that there isn't a noticeable performance drop when using IRQ-less
[all …]
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| /Linux-v5.15/arch/um/drivers/ |
| D | port_kern.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{linux.intel,addtoit}.com)
50 fd = os_rcv_fd(conn->socket[0], &conn->helper_pid); in pipe_interrupt()
52 if (fd == -EAGAIN) in pipe_interrupt()
56 -fd); in pipe_interrupt()
57 os_close_file(conn->fd); in pipe_interrupt()
60 list_del(&conn->list); in pipe_interrupt()
62 conn->fd = fd; in pipe_interrupt()
63 list_add(&conn->list, &conn->port->connections); in pipe_interrupt()
65 complete(&conn->port->done); in pipe_interrupt()
[all …]
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| /Linux-v5.15/drivers/bus/ |
| D | arm-cci.c | 17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
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| /Linux-v5.15/drivers/net/wwan/ |
| D | wwan_hwsim.c | 1 // SPDX-License-Identifier: GPL-2.0-only
44 spinlock_t ports_lock; /* Serialize ports creation/deletion */
46 struct list_head ports; member
73 ndev->stats.tx_packets++; in wwan_hwsim_netdev_xmit()
74 ndev->stats.tx_bytes += skb->len; in wwan_hwsim_netdev_xmit()
85 ndev->netdev_ops = &wwan_hwsim_netdev_ops; in wwan_hwsim_netdev_setup()
86 ndev->needs_free_netdev = true; in wwan_hwsim_netdev_setup()
88 ndev->mtu = ETH_DATA_LEN; in wwan_hwsim_netdev_setup()
89 ndev->min_mtu = ETH_MIN_MTU; in wwan_hwsim_netdev_setup()
90 ndev->max_mtu = ETH_MAX_MTU; in wwan_hwsim_netdev_setup()
[all …]
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| /Linux-v5.15/drivers/input/serio/ |
| D | ps2mult.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Dmitry Eremin-Solenikov
14 MODULE_AUTHOR("Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>");
37 struct ps2mult_port ports[PS2MULT_NUM_PORTS]; member
66 struct serio *mx_serio = psm->mx_serio; in ps2mult_select_port()
68 serio_write(mx_serio, port->sel); in ps2mult_select_port()
69 psm->out_port = port; in ps2mult_select_port()
70 dev_dbg(&mx_serio->dev, "switched to sel %02x\n", port->sel); in ps2mult_select_port()
75 struct serio *mx_port = serio->parent; in ps2mult_serio_write()
77 struct ps2mult_port *port = serio->port_data; in ps2mult_serio_write()
[all …]
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