Searched +full:opp +full:- +full:1400000000 (Results 1 – 12 of 12) sorted by relevance
/Linux-v6.1/arch/arm/boot/dts/ |
D | tegra30-cpu-opp-microvolt.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 cpu0_opp_table: opp-table-cpu0 { 5 opp-51000000-800 { 6 opp-microvolt = <800000 800000 1250000>; 9 opp-51000000-850 { 10 opp-microvolt = <850000 850000 1250000>; 13 opp-51000000-912 { 14 opp-microvolt = <912000 912000 1250000>; 17 opp-102000000-800 { 18 opp-microvolt = <800000 800000 1250000>; [all …]
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D | tegra30-cpu-opp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 cpu0_opp_table: opp-table-cpu0 { 5 compatible = "operating-points-v2"; 6 opp-shared; 8 opp-51000000-800 { 9 clock-latency-ns = <100000>; 10 opp-supported-hw = <0x1F 0x31FE>; 11 opp-hz = /bits/ 64 <51000000>; 14 opp-51000000-850 { 15 clock-latency-ns = <100000>; [all …]
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D | exynos5800.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 20 compatible = "samsung,exynos5800-clock", "syscon"; 24 opp-2000000000 { 25 opp-hz = /bits/ 64 <2000000000>; 26 opp-microvolt = <1312500 1312500 1500000>; 27 clock-latency-ns = <140000>; 29 opp-1900000000 { 30 opp-hz = /bits/ 64 <1900000000>; 31 opp-microvolt = <1262500 1262500 1500000>; 32 clock-latency-ns = <140000>; [all …]
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D | exynos5422-odroidxu3-lite.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3-Lite board device tree source 11 /dts-v1/; 12 #include "exynos5422-odroidxu3-common.dtsi" 13 #include "exynos5422-odroidxu3-audio.dtsi" 14 #include "exynos54xx-odroidxu-leds.dtsi" 18 compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; 34 samsung,asv-bin = <2>; 38 * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies 43 /delete-node/opp-2000000000; [all …]
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D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 29 fimc-lite0 = &fimc_lite_0; 30 fimc-lite1 = &fimc_lite_1; 35 #address-cells = <1>; 36 #size-cells = <0>; 38 cpu-map { 57 compatible = "arm,cortex-a9"; 60 clock-names = "cpu"; 61 operating-points-v2 = <&cpu0_opp_table>; [all …]
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D | uniphier-pro5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "socionext,uniphier-pro5"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; 24 enable-method = "psci"; [all …]
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D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 50 #address-cells = <1>; 51 #size-cells = <0>; 53 cpu-map { 66 compatible = "arm,cortex-a15"; 69 clock-names = "cpu"; 70 operating-points-v2 = <&cpu0_opp_table>; [all …]
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D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. 45 cluster_a15_opp_table: opp-table0 { 46 compatible = "operating-points-v2"; 47 opp-shared; 49 opp-1800000000 { 50 opp-hz = /bits/ 64 <1800000000>; [all …]
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D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/opp/ |
D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) Bindings 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states [all …]
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/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/exynos/ |
D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 35 arm-a57-pmu { [all …]
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