Home
last modified time | relevance | path

Searched +full:off +full:- +full:chip (Results 1 – 25 of 1037) sorted by relevance

12345678910>>...42

/Linux-v5.15/arch/arm/mach-s3c/
Dgpio-cfg-helpers.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Samsung Platform - GPIO pin configuration helper definitions
23 static inline int samsung_gpio_do_setcfg(struct samsung_gpio_chip *chip, in samsung_gpio_do_setcfg() argument
24 unsigned int off, unsigned int config) in samsung_gpio_do_setcfg() argument
26 return (chip->config->set_config)(chip, off, config); in samsung_gpio_do_setcfg()
29 static inline unsigned samsung_gpio_do_getcfg(struct samsung_gpio_chip *chip, in samsung_gpio_do_getcfg() argument
30 unsigned int off) in samsung_gpio_do_getcfg() argument
32 return (chip->config->get_config)(chip, off); in samsung_gpio_do_getcfg()
35 static inline int samsung_gpio_do_setpull(struct samsung_gpio_chip *chip, in samsung_gpio_do_setpull() argument
36 unsigned int off, samsung_gpio_pull_t pull) in samsung_gpio_do_setpull() argument
[all …]
Dgpio-samsung.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
11 // Samsung - GPIOlib support
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
35 #include "gpio-core.h"
36 #include "gpio-cfg.h"
37 #include "gpio-cfg-helpers.h"
40 int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, in samsung_gpio_setpull_updown() argument
41 unsigned int off, samsung_gpio_pull_t pull) in samsung_gpio_setpull_updown() argument
[all …]
/Linux-v5.15/sound/pcmcia/pdaudiocf/
Dpdaudiocf_irq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 struct snd_pdacf *chip = dev; in pdacf_interrupt() local
22 if ((chip->chip_status & (PDAUDIOCF_STAT_IS_STALE| in pdacf_interrupt()
27 stat = inw(chip->port + PDAUDIOCF_REG_ISR); in pdacf_interrupt()
31 if (chip->pcm_substream) in pdacf_interrupt()
37 snd_ak4117_check_rate_and_errors(chip->ak4117, 0); in pdacf_interrupt()
43 while (size-- > 0) { in pdacf_transfer_mono16()
53 while (size-- > 0) { in pdacf_transfer_mono32()
63 while (size-- > 0) { in pdacf_transfer_stereo16()
73 while (size-- > 0) { in pdacf_transfer_stereo32()
[all …]
/Linux-v5.15/drivers/gpio/
Dgpio-max732x.c1 // SPDX-License-Identifier: GPL-2.0-only
28 * - Push Pull Output
29 * - Input
30 * - Open Drain I/O
39 * - Group A : by I2C address 0b'110xxxx
40 * - Group B : by I2C address 0b'101xxxx
54 * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
59 #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
61 #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
158 static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) in max732x_writeb() argument
[all …]
Dgpio-adp5520.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 static int adp5520_gpio_get_value(struct gpio_chip *chip, unsigned off) in adp5520_gpio_get_value() argument
28 dev = gpiochip_get_data(chip); in adp5520_gpio_get_value()
35 if (test_bit(off, &dev->output)) in adp5520_gpio_get_value()
36 adp5520_read(dev->master, ADP5520_GPIO_OUT, &reg_val); in adp5520_gpio_get_value()
38 adp5520_read(dev->master, ADP5520_GPIO_IN, &reg_val); in adp5520_gpio_get_value()
40 return !!(reg_val & dev->lut[off]); in adp5520_gpio_get_value()
43 static void adp5520_gpio_set_value(struct gpio_chip *chip, in adp5520_gpio_set_value() argument
44 unsigned off, int val) in adp5520_gpio_set_value() argument
47 dev = gpiochip_get_data(chip); in adp5520_gpio_set_value()
[all …]
Dgpio-hisi.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define HISI_GPIO_DRIVER_NAME "gpio-hisi"
36 struct gpio_chip chip; member
44 static inline u32 hisi_gpio_read_reg(struct gpio_chip *chip, in hisi_gpio_read_reg() argument
45 unsigned int off) in hisi_gpio_read_reg() argument
48 container_of(chip, struct hisi_gpio, chip); in hisi_gpio_read_reg()
49 void __iomem *reg = hisi_gpio->reg_base + off; in hisi_gpio_read_reg()
54 static inline void hisi_gpio_write_reg(struct gpio_chip *chip, in hisi_gpio_write_reg() argument
55 unsigned int off, u32 val) in hisi_gpio_write_reg() argument
58 container_of(chip, struct hisi_gpio, chip); in hisi_gpio_write_reg()
[all …]
Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
120 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
132 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in pca953x_acpi_get_irq()
146 * relative. Since first controller (gpio-sch.c) and
147 * second (gpio-dwapb.c) are at the fixed bases, we may
169 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) argument
216 static int pca953x_bank_shift(struct pca953x_chip *chip) in pca953x_bank_shift() argument
218 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); in pca953x_bank_shift()
240 * - Standard set, below 0x40, each port can be replicated up to 8 times
241 * - PCA953x standard
[all …]
/Linux-v5.15/arch/mips/alchemy/common/
Dgpiolib.c2 * Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
37 #include <asm/mach-au1x00/gpio-au1000.h>
38 #include <asm/mach-au1x00/gpio-au1300.h>
40 static int gpio2_get(struct gpio_chip *chip, unsigned offset) in gpio2_get() argument
45 static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value) in gpio2_set() argument
50 static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset) in gpio2_direction_input() argument
55 static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset, in gpio2_direction_output() argument
62 static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) in gpio2_to_irq() argument
68 static int gpio1_get(struct gpio_chip *chip, unsigned offset) in gpio1_get() argument
73 static void gpio1_set(struct gpio_chip *chip, in gpio1_set() argument
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_zec12/
Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
/Linux-v5.15/drivers/leds/
Dleds-an30259a.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Driver for Panasonic AN30259A 3-channel LED driver
24 #define AN30259A_LED_EN(x) BIT((x) - 1)
25 #define AN30259A_LED_SLOPE(x) BIT(((x) - 1) + 4)
27 #define AN30259A_REG_LEDCC(x) (0x03 + ((x) - 1))
30 #define AN30259A_REG_SLOPE(x) (0x06 + ((x) - 1))
34 #define AN30259A_REG_LEDCNT1(x) (0x09 + (4 * ((x) - 1)))
38 #define AN30259A_REG_LEDCNT2(x) (0x0A + (4 * ((x) - 1)))
43 #define AN30259A_REG_LEDCNT3(x) (0x0B + (4 * ((x) - 1)))
47 #define AN30259A_REG_LEDCNT4(x) (0x0C + (4 * ((x) - 1)))
[all …]
Dleds-aw2013.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Driver for Awinic AW2013 3-channel LED driver
29 #define AW2013_LCFG_IMAX_MASK (BIT(0) | BIT(1)) // Should be 0-3
39 #define AW2013_LEDT0_T1(x) ((x) << 4) // Should be 0-7
40 #define AW2013_LEDT0_T2(x) (x) // Should be 0-5
43 #define AW2013_LEDT1_T3(x) ((x) << 4) // Should be 0-7
44 #define AW2013_LEDT1_T4(x) (x) // Should be 0-7
47 #define AW2013_LEDT2_T0(x) ((x) << 4) // Should be 0-8
48 #define AW2013_LEDT2_REPEAT(x) (x) // Should be 0-15
57 struct aw2013 *chip; member
[all …]
/Linux-v5.15/sound/ppc/
Dburgundy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 snd_pmac_burgundy_busy_wait(struct snd_pmac *chip) in snd_pmac_burgundy_busy_wait() argument
22 while ((in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD) && timeout--) in snd_pmac_burgundy_busy_wait()
29 snd_pmac_burgundy_extend_wait(struct snd_pmac *chip) in snd_pmac_burgundy_extend_wait() argument
33 while (!(in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) in snd_pmac_burgundy_extend_wait()
38 while ((in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) in snd_pmac_burgundy_extend_wait()
45 snd_pmac_burgundy_wcw(struct snd_pmac *chip, unsigned addr, unsigned val) in snd_pmac_burgundy_wcw() argument
47 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); in snd_pmac_burgundy_wcw()
48 snd_pmac_burgundy_busy_wait(chip); in snd_pmac_burgundy_wcw()
49 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); in snd_pmac_burgundy_wcw()
[all …]
/Linux-v5.15/drivers/pwm/
Dpwm-pca9685.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for PCA9685 16-channel 12-bit PWM LED controller
8 * based on the pwm-twl-led.c driver
26 * Because the PCA9685 has only one prescaler per chip, only the first channel
79 struct pwm_chip chip; member
89 static inline struct pca9685 *to_pca(struct pwm_chip *chip) in to_pca() argument
91 return container_of(chip, struct pca9685, chip); in to_pca()
98 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1)) in pca9685_prescaler_can_change()
101 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1) in pca9685_prescaler_can_change()
107 return test_bit(channel, pca->pwms_enabled); in pca9685_prescaler_can_change()
[all …]
Dpwm-twl-led.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * This driver is a complete rewrite of the former pwm-twl6030.c authorded by:
22 * - LEDA uses PWMA
23 * - LEDB uses PWMB
49 struct pwm_chip chip; member
53 static inline struct twl_pwmled_chip *to_twl(struct pwm_chip *chip) in to_twl() argument
55 return container_of(chip, struct twl_pwmled_chip, chip); in to_twl()
58 static int twl4030_pwmled_config(struct pwm_chip *chip, struct pwm_device *pwm, in twl4030_pwmled_config() argument
67 * On-cycle is set to 1 (the minimum allowed value) in twl4030_pwmled_config()
68 * The off time of 0 is not configurable, so the mapping is: in twl4030_pwmled_config()
[all …]
Dpwm-twl.c1 // SPDX-License-Identifier: GPL-2.0-only
49 struct pwm_chip chip; member
55 static inline struct twl_pwm_chip *to_twl(struct pwm_chip *chip) in to_twl() argument
57 return container_of(chip, struct twl_pwm_chip, chip); in to_twl()
60 static int twl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in twl_pwm_config() argument
69 * On-cycle is set to 1 (the minimum allowed value) in twl_pwm_config()
70 * The off time of 0 is not configurable, so the mapping is: in twl_pwm_config()
71 * 0 -> off cycle = 2, in twl_pwm_config()
72 * 1 -> off cycle = 2, in twl_pwm_config()
73 * 2 -> off cycle = 3, in twl_pwm_config()
[all …]
/Linux-v5.15/arch/powerpc/platforms/powernv/
Dopal-xscom.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * its form. Bits 4-11 are always 0. in opal_scom_unmangle()
34 * of the 64-bit address, and thus cannot use the indirect bit. in opal_scom_unmangle()
37 * bits 4-7 (IBM notation) instead of bit 0-3 in this API, we in opal_scom_unmangle()
40 * For in-kernel use, we don't need to do this mangling. In in opal_scom_unmangle()
41 * kernel won't have bits 4-7 set. in opal_scom_unmangle()
44 * debugfs will always set 0-3 = 0 and clear 4-7 in opal_scom_unmangle()
45 * kernel will always clear 0-3 = 0 and set 4-7 in opal_scom_unmangle()
55 static int opal_scom_read(uint32_t chip, uint64_t addr, u64 reg, u64 *value) in opal_scom_read() argument
61 rc = opal_xscom_read(chip, reg, (__be64 *)__pa(&v)); in opal_scom_read()
[all …]
/Linux-v5.15/drivers/pinctrl/spear/
Dpinctrl-plgpio.c56 * chip: gpio framework specific chip information structure
58 * machines where mapping b/w pin and offset is not 1-to-1.
60 * machines where mapping b/w pin and offset is not 1-to-1.
69 struct gpio_chip chip; member
108 static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) in plgpio_direction_input() argument
110 struct plgpio *plgpio = gpiochip_get_data(chip); in plgpio_direction_input()
114 if (plgpio->p2o && (plgpio->p2o_regs & PTO_DIR_REG)) { in plgpio_direction_input()
115 offset = plgpio->p2o(offset); in plgpio_direction_input()
116 if (offset == -1) in plgpio_direction_input()
117 return -EINVAL; in plgpio_direction_input()
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z14/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z15/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page"
31 "Unit": "CPU-M-CF",
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dgpmc-eth.txt1 Device tree bindings for Ethernet chip connected to TI GPMC
4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
18 Child nodes need to specify the GPMC bus address width using the "bank-width"
20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21 address width, it supports devices with 32-bit word registers.
23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit
27 and 16-bit devices and so must be either 1 or 2 bytes.
28 - compatible: Compatible string property for the ethernet child device.
[all …]
/Linux-v5.15/drivers/dma/dw-edma/
Ddw-edma-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
14 #include <linux/pci-epf.h>
18 #include "dw-edma-core.h"
29 .off = b, \
35 off_t off; member
58 .rg.off = 0x00001000, /* 4 Kbytes */
62 /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
64 /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
68 /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z196/
Dextended.json3 "Unit": "CPU-M-CF",
7 …ion": "A directory write to the Level-1 D-Cache directory where the returned cache line was source…
10 "Unit": "CPU-M-CF",
14 …ion": "A directory write to the Level-1 I-Cache directory where the returned cache line was source…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
28 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
31 "Unit": "CPU-M-CF",
35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache"
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z13/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/mtd/
Dgpmc-nor.txt8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and
12 16-bit devices and so must be either 1 or 2 bytes.
13 - compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
14 - gpmc,cs-on-ns: Chip-select assertion time
15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
16 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
17 - gpmc,oe-on-ns: Output-enable assertion time
18 - gpmc,oe-off-ns: Output-enable de-assertion time
19 - gpmc,we-on-ns Write-enable assertion time
[all …]
/Linux-v5.15/drivers/char/tpm/
Dtpm-dev-common.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include "tpm-dev.h"
24 static ssize_t tpm_dev_transmit(struct tpm_chip *chip, struct tpm_space *space, in tpm_dev_transmit() argument
30 ret = tpm2_prepare_space(chip, space, buf, bufsiz); in tpm_dev_transmit()
32 * response with a TPM2_RC_COMMAND_CODE return for user-space. in tpm_dev_transmit()
34 if (ret == -EOPNOTSUPP) { in tpm_dev_transmit()
35 header->length = cpu_to_be32(sizeof(*header)); in tpm_dev_transmit()
36 header->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS); in tpm_dev_transmit()
37 header->return_code = cpu_to_be32(TPM2_RC_COMMAND_CODE | in tpm_dev_transmit()
44 len = tpm_transmit(chip, buf, bufsiz); in tpm_dev_transmit()
[all …]

12345678910>>...42