/Linux-v5.10/Documentation/input/devices/ |
D | walkera0701.rst | 104 One binary and octal value can be grouped to nibble. 24 nibbles + one binary 109 absolute binary value. (10 bits per channel). Next nibble is checksum for 114 four channels. In nibbles 22 and 23 is a special magic number. Nibble 24 is 117 After last octal value for nibble 24 and next sync pulse one additional 126 nibble (only first 3 bits are used). Binary value for checksum nibble is
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/Linux-v5.10/drivers/media/rc/keymaps/ |
D | rc-dvbsky.c | 6 * Copyright (c) 2010-2012 by Nibble Max <nibble.max@gmail.com> 73 MODULE_AUTHOR("Nibble Max <nibble.max@gmail.com>");
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/Linux-v5.10/drivers/leds/ |
D | leds-mlxreg.c | 70 * Each LED is controlled through low or high nibble of the relevant in mlxreg_led_store_hw() 75 * Parameter mask specifies which nibble is used for specific LED: mask in mlxreg_led_store_hw() 76 * 0xf0 - lower nibble is to be used (bits from 0 to 3), mask 0x0f - in mlxreg_led_store_hw() 77 * higher nibble (bits from 4 to 7). in mlxreg_led_store_hw() 107 * Each LED is controlled through low or high nibble of the relevant in mlxreg_led_get_hw() 112 * Parameter mask specifies which nibble is used for specific LED: mask in mlxreg_led_get_hw() 113 * 0xf0 - lower nibble is to be used (bits from 0 to 3), mask 0x0f - in mlxreg_led_get_hw() 114 * higher nibble (bits from 4 to 7). in mlxreg_led_get_hw()
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D | leds-mlxcpld.c | 263 * Each LED is controlled through low or high nibble of the relevant in mlxcpld_led_store_hw() 268 * Parameter mask specifies which nibble is used for specific LED: mask in mlxcpld_led_store_hw() 269 * 0xf0 - lower nibble is to be used (bits from 0 to 3), mask 0x0f - in mlxcpld_led_store_hw() 270 * higher nibble (bits from 4 to 7). in mlxcpld_led_store_hw()
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/Linux-v5.10/drivers/parport/ |
D | ieee1284_ops.c | 143 /* Nibble mode. */ 157 unsigned char nibble; in parport_ieee1284_read_nibble() 175 pr_debug("%s: Nibble timeout at event 9 (%d bytes)\n", in parport_ieee1284_read_nibble() 182 /* Read a nibble. */ in parport_ieee1284_read_nibble() 183 nibble = parport_read_status (port) >> 3; in parport_ieee1284_read_nibble() 184 nibble &= ~8; in parport_ieee1284_read_nibble() 185 if ((nibble & 0x10) == 0) in parport_ieee1284_read_nibble() 186 nibble |= 8; in parport_ieee1284_read_nibble() 187 nibble &= 0xf; in parport_ieee1284_read_nibble() 197 pr_debug("%s: Nibble timeout at event 11\n", in parport_ieee1284_read_nibble() [all …]
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/Linux-v5.10/drivers/net/plip/ |
D | plip.c | 61 Trigger by sending nibble '0x8' (this causes interrupt on other end) 133 /* Nibble time out = PLIP_NIBBLE_WAIT * PLIP_DELAY_UNIT usec */ 182 enum plip_nibble_state nibble; member 212 unsigned long nibble; member 300 nl->nibble = PLIP_NIBBLE_WAIT; in plip_init_netdev() 584 unsigned short nibble_timeout = nl->nibble; in plip_receive_packet() 596 rcv->nibble = PLIP_NB_BEGIN; in plip_receive_packet() 602 &rcv->nibble, &rcv->length.b.lsb)) { in plip_receive_packet() 614 &rcv->nibble, &rcv->length.b.lsb)) in plip_receive_packet() 622 &rcv->nibble, &rcv->length.b.msb)) in plip_receive_packet() [all …]
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/Linux-v5.10/drivers/media/tuners/ |
D | m88rs6000t.h | 5 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
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/Linux-v5.10/sound/firewire/digi00x/ |
D | amdtp-dot.c | 65 * the length of the added pattern only depends on the lower nibble in dot_scrt() 72 * the lower nibble of the salt. Interleaved sequence. in dot_scrt() 78 /* circular list for the salt's hi nibble. */ in dot_scrt() 83 * start offset for upper nibble mapping. in dot_scrt() 84 * note: 9 is /special/. In the case where the high nibble == 0x9, in dot_scrt() 85 * hir[] is not used and - coincidentally - the salt's hi nibble is in dot_scrt()
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/Linux-v5.10/arch/arm/probes/ |
D | decode.c | 248 /* Each nibble has same value as that at INSN_NEW_BITS bit 16 */ 254 * Each nibble in regs contains a value from enum decode_reg_type. For each 255 * non-zero value, the corresponding nibble in pinsn is validated and modified 261 probes_opcode_t mask = 0xf; /* Start at least significant nibble */ in decode_regs() 270 /* Nibble not a register, skip to next */ in decode_regs() 319 /* Replace value of nibble with new register number... */ in decode_regs()
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/Linux-v5.10/drivers/scsi/isci/ |
D | remote_node_table.h | 153 * sets of three into a single nibble. When the STP RNi is allocated all 154 * of the bits in the nibble are cleared. This math results in a table size 162 * This field is the nibble selector for the above table. There are three
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/Linux-v5.10/Documentation/networking/ |
D | plip.rst | 199 send header nibble '0x8' 210 To start a transfer the transmitting machine outputs a nibble 0x08. 219 OUT := low nibble, OUT.4 := 1 221 OUT := high nibble, OUT.4 := 0
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/Linux-v5.10/drivers/ide/ |
D | ht6560b.c | 78 * The higher nibble of value is the Recovery Time (rt) and the lower nibble 86 * High nibble: Recovery Cycle Time (rt) 89 * Low nibble: Active Cycle Time (at)
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/Linux-v5.10/drivers/media/rc/ |
D | ir-xmp-decoder.c | 89 * the 4th nibble should be 15 so base the divider on this in ir_xmp_decode() 148 /* Expect 8 or 16 nibble pulses. 16 in case of 'final' frame */ in ir_xmp_decode() 168 /* store nibble raw data, decode after trailer */ in ir_xmp_decode()
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/Linux-v5.10/drivers/auxdisplay/ |
D | hd44780.c | 83 /* High nibble + RS, RW */ in hd44780_write_gpio4() 93 /* Low nibble */ in hd44780_write_gpio4() 149 /* Command nibble + RS, RW */ in hd44780_write_cmd_raw_gpio4()
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/Linux-v5.10/drivers/staging/fbtft/ |
D | fb_uc1611.c | 173 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var() 186 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var() 199 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var() 212 | (0x0 & 0x1)); /* MS nibble last (default) */ in set_var()
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/Linux-v5.10/drivers/media/pci/smipcie/ |
D | smipcie-ir.c | 5 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
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/Linux-v5.10/Documentation/ABI/testing/ |
D | sysfs-driver-wacom | 77 the display. The low nibble of each byte contains the first 78 line, and the high nibble contains the second line.
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/Linux-v5.10/arch/arm/mm/ |
D | abort-lv4t.S | 91 and r9, r8, #0x00f @ get Rm / low nibble of immediate value 93 andne r6, r8, #0xf00 @ { immediate high nibble 212 adc r6, r6, r6, lsr #4 @ high + low nibble + R bit
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/Linux-v5.10/drivers/net/ethernet/realtek/ |
D | atp.h | 56 #define ISRh_RxErr 0x11 /* ISR, high nibble */ 197 /* Write a byte out using nibble mode. The low nibble is written first. */
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/Linux-v5.10/drivers/w1/masters/ |
D | ds1wm.c | 406 "pass: %d beginning nibble loop\n", pass); in ds1wm_search() 410 /* we work one nibble at a time */ in ds1wm_search() 411 /* each nibble is interleaved to form a byte */ in ds1wm_search() 427 "pass: %d nibble: %d read error\n", pass, i); in ds1wm_search() 455 "pass: %d nibble loop complete, exiting ASM\n", pass); in ds1wm_search()
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/Linux-v5.10/drivers/isdn/mISDN/ |
D | dsp_blowfish.c | 378 u8 nibble; in dsp_bf_encrypt() local 394 nibble = dsp_audio_law2seven[bf_data_in[4]]; in dsp_bf_encrypt() 395 yr = nibble; in dsp_bf_encrypt() 396 yl = (yl << 4) | (nibble >> 3); in dsp_bf_encrypt() 469 u8 nibble; in dsp_bf_decrypt() local 492 nibble = bf_crypt_inring[j++ & 15]; /* bit7 = 0 */ in dsp_bf_decrypt() 493 yr = nibble; in dsp_bf_decrypt() 494 yl = (yl << 4) | (nibble >> 3); in dsp_bf_decrypt()
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/Linux-v5.10/arch/x86/pci/ |
D | irq.c | 241 * The VIA pirq rules are nibble-based, like ALI, 257 * The VIA pirq rules are nibble-based, like ALI, 259 * However, for 82C586, nibble map is different . 279 * ITE 8330G pirq rules are nibble-based 301 * OPTI: high four bits are nibble pointer.. 316 * Cyrix: nibble offset 0x5C 425 * VLSI: nibble offset 0x74 - educated guess due to routing table and 457 * register is a straight binary coding of desired PIC IRQ (low nibble). 482 * The AMD756 pirq rules are nibble-based
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/Linux-v5.10/include/uapi/linux/ |
D | if_plip.h | 21 unsigned long nibble; member
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/Linux-v5.10/drivers/video/backlight/ |
D | arcxcnn_bl.c | 73 #define ARCXCNN_WLED_ISET_LSB 0x07 /* LED ISET LSB (in upper nibble) */ 117 /* lower nibble of brightness goes in upper nibble of LSB register */ in arcxcnn_set_brightness()
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/Linux-v5.10/drivers/gpu/drm/panel/ |
D | panel-novatek-nt35510.c | 182 * bits 0..2 in the lower nibble controls PCK, the booster clock 192 * bits 4..6 in the upper nibble controls BTP, the boosting 211 * bits 0..2 in the lower nibble controls NCK, the booster clock 213 * bits 4..5 in the upper nibble controls BTN, the boosting 231 * bits 0..2 in the lower nibble controls HCK, the booster clock 233 * bits 4..5 in the upper nibble controls BTH, the boosting 250 * bits 0..2 in the lower nibble controls LCK, the booster clock 252 * bits 4..5 in the upper nibble controls BTL, the boosting
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