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/Linux-v5.15/include/video/
Ddisplay_timing.h1 /* SPDX-License-Identifier: GPL-2.0-only */
23 /* drive data on pos. edge */
25 /* drive data on neg. edge */
30 /* drive sync on pos. edge */
32 /* drive sync on neg. edge */
56 * |<- sync ->|<- back ->|<----- active ----->|<- front ->|<- sync..
97 if (disp->num_timings > index) in display_timings_get()
98 return disp->timings[index]; in display_timings_get()
/Linux-v5.15/drivers/comedi/drivers/
Ds526.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
26 * [0] - I/O port base address
57 #define S526_DIO_CTRL_DIO3_NEG BIT(15) /* irq on DIO3 neg/pos edge */
58 #define S526_DIO_CTRL_DIO2_NEG BIT(14) /* irq on DIO2 neg/pos edge */
59 #define S526_DIO_CTRL_DIO1_NEG BIT(13) /* irq on DIO1 neg/pos edge */
60 #define S526_DIO_CTRL_DIO0_NEG BIT(12) /* irq on DIO0 neg/pos edge */
63 #define S526_DIO_CTRL_GRP2_NEG BIT(8) /* irq on DIO[4-7] neg/pos edge */
68 #define S526_INT_CNTR(x) BIT(3 + (3 - ((x) & 0x3)))
133 /* Control/Status - R = readable, W = writeable, C = write 1 to clear */
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
Dstm32h750i-art-pi.dts2 * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
42 * For art-pi board resources, you can refer to link:
43 * https://art-pi.gitee.io/website/
46 /dts-v1/;
48 #include "stm32h7-pinctrl.dtsi"
49 #include <dt-bindings/interrupt-controller/irq.h>
50 #include <dt-bindings/gpio/gpio.h>
53 model = "RT-Thread STM32H750i-ART-PI board";
54 compatible = "st,stm32h750i-art-pi", "st,stm32h750";
[all …]
Dstm32mp157a-icore-stm32mp1-ctouch2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
8 /dts-v1/;
10 #include "stm32mp157a-icore-stm32mp1.dtsi"
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxaa-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "engicam,icore-stm32mp1-ctouch2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
25 stdout-path = "serial0:115200n8";
[all …]
Dstm32mp157c-lxa-mc1.dts1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
7 /dts-v1/;
10 #include "stm32mp15xx-osd32.dtsi"
11 #include "stm32mp15xxac-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/pwm/pwm.h>
17 model = "Linux Automation MC-1 board";
18 compatible = "lxa,stm32mp157c-mc1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
28 compatible = "pwm-backlight";
[all …]
Dstm32mp157a-icore-stm32mp1-edimm2.2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
8 /dts-v1/;
10 #include "stm32mp157a-icore-stm32mp1.dtsi"
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxaa-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "engicam,icore-stm32mp1-edimm2.2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
25 stdout-path = "serial0:115200n8";
[all …]
Dstm32mp157a-microgea-stm32mp1-microdev2.0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
8 /dts-v1/;
10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxaa-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "engicam,microgea-stm32mp1-microdev2.0",
18 "engicam,microgea-stm32mp1", "st,stm32mp157";
26 stdout-path = "serial0:115200n8";
[all …]
Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
24 reserved-memory {
25 #address-cells = <1>;
26 #size-cells = <1>;
30 compatible = "shared-dma-pool";
[all …]
Dstm32mp157a-iot-box.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "stm32mp157a-stinger96.dtsi"
11 compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
13 wlan_pwr: regulator-wlan {
14 compatible = "regulator-fixed";
16 regulator-name = "wl-reg";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
21 enable-active-high;
[all …]
Dstm32mp157c-odyssey.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp157c-odyssey-som.dtsi"
11 model = "Seeed Studio Odyssey-STM32MP157C Board";
12 compatible = "seeed,stm32mp157c-odyssey",
13 "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
21 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&ethernet0_rgmii_pins_a>;
28 pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
29 pinctrl-names = "default", "sleep";
[all …]
Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
20 stdout-path = "serial0:115200n8";
28 reserved-memory {
[all …]
Dstm32h743i-disco.dts2 * Copyright 2017 - Patrice Chotard <patrice.chotard@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32h7-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-Discovery board";
49 compatible = "st,stm32h743i-disco", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
65 v3v3: regulator-v3v3 {
66 compatible = "regulator-fixed";
67 regulator-name = "v3v3";
[all …]
Dstm32h743i-eval.dts2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32h7-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-EVAL board";
49 compatible = "st,stm32h743i-eval", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
65 vdda: regulator-vdda {
66 compatible = "regulator-fixed";
67 regulator-name = "vdda";
[all …]
Dstm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
8 /dts-v1/;
10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxaa-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
18 "engicam,microgea-stm32mp1", "st,stm32mp157";
26 stdout-path = "serial0:115200n8";
[all …]
Dstm32mp157c-odyssey-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxac-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
17 model = "Seeed Studio Odyssey-STM32MP157C SOM";
18 compatible = "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
25 reserved-memory {
[all …]
Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
[all …]
Dstm32mp157a-stinger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
24 stdout-path = "serial1:115200n8";
33 compatible = "gpio-leds";
38 linux,default-trigger = "heartbeat";
39 default-state = "off";
[all …]
Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
14 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 stdout-path = "serial0:115200n8";
27 clk_ext_camera: clk-ext-camera {
28 #clock-cells = <0>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
[all …]
/Linux-v5.15/drivers/net/ethernet/freescale/enetc/
Denetc_mdio.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
22 /* external MDIO only - driven on neg MDC edge */
36 return enetc_port_rd_mdio(mdio_priv->hw, mdio_priv->mdio_base + off); in enetc_mdio_rd()
42 enetc_port_wr_mdio(mdio_priv->hw, mdio_priv->mdio_base + off, val); in enetc_mdio_wr()
60 struct enetc_mdio_priv *mdio_priv = bus->priv; in enetc_mdio_write()
107 struct enetc_mdio_priv *mdio_priv = bus->priv; in enetc_mdio_read()
149 dev_dbg(&bus->dev, in enetc_mdio_read()
167 return ERR_PTR(-ENOMEM); in enetc_hw_alloc()
169 hw->port = port_regs; in enetc_hw_alloc()
/Linux-v5.15/drivers/net/ethernet/sun/
Dsungem.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 * This auto-clearing does not occur when the alias at GREG_STAT2
69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level
130 * This 13-bit register is programmed by the driver to hold the descriptor
136 * This 13-bit register is updated by GEM to hold to descriptor entry index
171 * them later. -DaveM
220 #define RXDMA_CFG_RINGSZ_32 0x00000000 /* - 32 entries */
221 #define RXDMA_CFG_RINGSZ_64 0x00000002 /* - 64 entries */
222 #define RXDMA_CFG_RINGSZ_128 0x00000004 /* - 128 entries */
223 #define RXDMA_CFG_RINGSZ_256 0x00000006 /* - 256 entries */
[all …]
/Linux-v5.15/arch/m68k/mac/
Dvia.c1 // SPDX-License-Identifier: GPL-2.0
6 * via them as are assorted bits and bobs - eg RTC, ADB.
14 * for info. A full-text web search on 6522 AND VIA will probably also
53 * _consistently_ lazy? - 1999-05-21 (jmt)
61 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
65 * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector
67 * p. 10-11 etc) but VIA outputs are not (see datasheet).
78 * disabled /NMRQ line low, the falling edge immediately triggers a CA1
80 * and therefore no interrupt, even after being re-enabled.
93 * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/e1000/
De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
88 * e1000_set_phy_type - Set the phy type member in the hw struct.
93 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
94 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
96 switch (hw->phy_id) { in e1000_set_phy_type()
102 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
105 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
106 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
[all …]
/Linux-v5.15/drivers/media/pci/tw5864/
Dtw5864-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
76 * 0->3 4 VLC data buffer in DDR (1M each)
77 * 0->7 8 VLC data buffer in DDR (512k each)
147 /* DDR-DPR Burst Read Enable */
157 * 0 Single R/W Access (Host <-> DDR)
158 * 1 Burst R/W Access (Host <-> DPR)
[all …]

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