Home
last modified time | relevance | path

Searched full:nand_clk (Results 1 – 16 of 16) sorted by relevance

/Linux-v6.6/drivers/mtd/nand/raw/
Dmeson_nand.c165 struct clk *nand_clk; member
272 ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate); in meson_nfc_select_chip()
1149 nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw); in meson_nfc_clk_init()
1150 if (IS_ERR(nfc->nand_clk)) in meson_nfc_clk_init()
1151 return PTR_ERR(nfc->nand_clk); in meson_nfc_clk_init()
1169 ret = clk_prepare_enable(nfc->nand_clk); in meson_nfc_clk_init()
1175 ret = clk_set_rate(nfc->nand_clk, 24000000); in meson_nfc_clk_init()
1182 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_clk_init()
1192 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_disable_clk()
/Linux-v6.6/Documentation/devicetree/bindings/mtd/
Ddenali,nand.yaml144 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
/Linux-v6.6/drivers/clk/actions/
Dowl-s500.c397 static OWL_COMP_DIV(nand_clk, "nand_clk", nand_clk_mux_p,
460 &nand_clk.common,
521 [CLK_NAND] = &nand_clk.common.hw,
/Linux-v6.6/drivers/clk/sunxi-ng/
Dccu-sun5i.c327 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
566 &nand_clk.common,
693 [CLK_NAND] = &nand_clk.common.hw,
827 [CLK_NAND] = &nand_clk.common.hw,
937 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun8i-a23.c293 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
506 &nand_clk.common,
628 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun8i-a33.c307 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
540 &nand_clk.common,
669 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun8i-h3.c334 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
574 &nand_clk.common,
714 [CLK_NAND] = &nand_clk.common.hw,
836 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun8i-a83t.c393 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents,
649 &nand_clk.common,
754 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun50i-a64.c412 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
698 &nand_clk.common,
814 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun4i-a10.c451 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
953 &nand_clk.common,
1148 [CLK_NAND] = &nand_clk.common.hw,
1306 [CLK_NAND] = &nand_clk.common.hw,
Dccu-sun8i-r40.c491 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
898 &nand_clk.common,
1101 [CLK_NAND] = &nand_clk.common.hw,
/Linux-v6.6/drivers/clk/socfpga/
Dclk-gate.c19 #define SOCFPGA_NAND_CLK "nand_clk"
Dclk-s10.c300 { STRATIX10_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0xA4,
Dclk-agilex.c331 { AGILEX_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
/Linux-v6.6/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_arria10.dtsi391 nand_clk: nand_clk { label
680 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
Dsocfpga.dtsi480 nand_clk: nand_clk { label
779 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;