/Linux-v6.1/drivers/mtd/nand/raw/ |
D | sm_common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2009 - Maxim Levitsky 9 /* Full oob structure as written on the flash */ 21 /* one sector is always 512 bytes, but it can consist of two nand pages */ 24 /* oob area is also 16 bytes, but might be from two pages */ 27 /* This is maximum zone size, and all devices that have more that one zone 28 have this size */ 31 /* support for small page nand */ 39 static inline int sm_sector_valid(struct sm_oob *oob) in sm_sector_valid() argument 41 return hweight16(oob->data_status) >= 5; in sm_sector_valid() [all …]
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D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand-ecc-sw-bch.h> 21 #include <linux/omap-dma.h> 29 #include <linux/omap-gpmc.h> 30 #include <linux/platform_data/mtd-nand-omap2.h> 32 #define DRIVER_NAME "omap2-nand" 131 #define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */ 145 struct nand_chip nand; member 172 /* NAND ready gpio */ [all …]
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D | nandsim.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * NAND flash simulator. 9 * Note: NS means "NAND Simulator". 132 MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command"); 133 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufact… 134 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID… 135 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete… 136 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolet… 139 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)"); 142 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)"); [all …]
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D | cadence-nand-controller.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Cadence NAND flash controller driver 12 #include <linux/dma-mapping.h> 24 * - PIO - can work in master or slave DMA 25 * - CDMA - needs Master DMA for accessing command descriptors. 26 * - Generic mode - can use only slave DMA. 29 * on NAND flash memory. Driver uses CDMA mode for 113 /* Size of last data sector. */ 115 /* Size of not-last data sector. */ 140 /* Transferred data block size for the slave DMA module. */ [all …]
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D | tegra_nand.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de> 10 #include <linux/dma-mapping.h> 34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20) argument 40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4) argument 41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0) argument 156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off)) 207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc() 211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc() 213 oobregion->offset = SKIP_SPARE_BYTES; in tegra_nand_ooblayout_rs_ecc() [all …]
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D | sh_flctl.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * SuperH FLCTL nand controller 8 * Based on fsl_elbc_nand.c, Copyright (c) 2006-2007 Freescale Semiconductor 16 #include <linux/dma-mapping.h> 38 return -ERANGE; in flctl_4secc_ooblayout_sp_ecc() 40 oobregion->offset = 0; in flctl_4secc_ooblayout_sp_ecc() 41 oobregion->length = chip->ecc.bytes; in flctl_4secc_ooblayout_sp_ecc() 50 return -ERANGE; in flctl_4secc_ooblayout_sp_free() 52 oobregion->offset = 12; in flctl_4secc_ooblayout_sp_free() 53 oobregion->length = 4; in flctl_4secc_ooblayout_sp_free() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mtd/ |
D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 15 flash chips. It has a memory-mapped register interface for both control 25 -- Additional SoC-specific NAND controller properties -- 27 The NAND controller is integrated differently on the variety of SoCs on which [all …]
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D | mtk-nand.txt | 1 MTK SoCs NAND FLASH controller (NFC) DT binding 3 This file documents the device tree bindings for MTK SoCs NAND controllers. 5 the nand controller interface driver and the ECC engine driver. 10 1) NFC NAND Controller Interface (NFI): 13 The first part of NFC is NAND Controller Interface (NFI) HW. 15 - compatible: Should be one of 16 "mediatek,mt2701-nfc", 17 "mediatek,mt2712-nfc", 18 "mediatek,mt7622-nfc". 19 - reg: Base physical address and size of NFI. [all …]
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/Linux-v6.1/arch/mips/boot/dts/brcm/ |
D | bcm97xxx-nand-cs1-bch24.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 &nand { 6 nand-on-flash-bbt; 8 nand-ecc-strength = <24>; 9 nand-ecc-step-size = <1024>; 10 brcm,nand-oob-sector-size = <27>; 13 compatible = "fixed-partitions"; 14 #address-cells = <1>; 15 #size-cells = <1>;
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D | bcm97xxx-nand-cs1-bch4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 &nand { 6 nand-on-flash-bbt; 8 nand-ecc-strength = <4>; 9 nand-ecc-step-size = <512>; 10 brcm,nand-oob-sector-size = <16>; 13 compatible = "fixed-partitions"; 14 #address-cells = <1>; 15 #size-cells = <1>;
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/Linux-v6.1/drivers/mtd/ |
D | sm_ftl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright © 2009 - Maxim Levitsky 16 #include <linux/mtd/nand-ecc-sw-hamming.h> 17 #include "nand/raw/sm_common.h" 31 MODULE_PARM_DESC(debug, "Debug level (0-2)"); 34 /* ------------------- sysfs attributes ---------------------------------- */ 47 strncpy(buf, sm_attr->data, sm_attr->len); in sm_attr_show() 48 return sm_attr->len; in sm_attr_show() 61 vendor = kstrndup(ftl->cis_buffer + SM_CIS_VENDOR_OFFSET, in sm_create_sysfs_attributes() 62 SM_SMALL_PAGE - SM_CIS_VENDOR_OFFSET, GFP_KERNEL); in sm_create_sysfs_attributes() [all …]
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/Linux-v6.1/drivers/mtd/nand/raw/brcmnand/ |
D | brcmnand.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright © 2010-2015 Broadcom Corporation 17 #include <linux/dma-mapping.h> 94 /* 512B flash cache in the NAND controller HW */ 237 /* List of NAND hosts (one for each chip-select) */ 240 /* EDU info, per-transaction */ 249 int sas; /* spare area size, per flash cache */ 251 u8 *oob; member 259 u8 *oob, u32 len, u8 dma_cmd); 261 /* in-memory cache of the FLASH_CACHE, used only for some commands */ [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | bcm958300k.dts | 33 /dts-v1/; 35 #include "bcm-cygnus.dtsi" 47 stdout-path = "serial0:115200n8"; 64 nand@1 { 67 nand-on-flash-bbt; 69 #address-cells = <1>; 70 #size-cells = <1>; 72 nand-ecc-strength = <24>; 73 nand-ecc-step-size = <1024>; 75 brcm,nand-oob-sector-size = <27>;
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D | bcm958305k.dts | 33 /dts-v1/; 35 #include "bcm-cygnus.dtsi" 47 stdout-path = "serial0:115200n8"; 72 nand@1 { 75 nand-on-flash-bbt; 77 #address-cells = <1>; 78 #size-cells = <1>; 80 nand-ecc-strength = <24>; 81 nand-ecc-step-size = <1024>; 83 brcm,nand-oob-sector-size = <27>;
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D | bcm911360_entphn.dts | 33 /dts-v1/; 35 #include "bcm-cygnus.dtsi" 36 #include "dt-bindings/input/input.h" 47 stdout-path = "serial0:115200n8"; 50 gpio-keys { 51 compatible = "gpio-keys"; 53 button-hook { 74 assigned-clocks = 77 assigned-clock-rates = <525000000>, <300000000>; 86 nand@1 { [all …]
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D | bcm958625-meraki-mx6x-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 5 * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> 8 #include "bcm-nsp.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 14 pwm-leds { 15 compatible = "pwm-leds"; 17 led-1 { 21 max-brightness = <255>; [all …]
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D | bcm958522er.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 54 open-source; 78 nand@0 { 81 nand-on-flash-bbt; 83 #address-cells = <1>; [all …]
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D | bcm958525er.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 54 open-source; 78 nand@0 { 81 nand-on-flash-bbt; 83 #address-cells = <1>; [all …]
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D | bcm958622hr.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 54 open-source; 82 nand@0 { 85 nand-on-flash-bbt; 87 #address-cells = <1>; [all …]
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D | bcm958525xmc.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 54 open-source; 76 temperature-sensor@4c { 94 nand@0 { 97 nand-on-flash-bbt; [all …]
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D | bcm958625hr.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 54 open-source; 60 i2c-bus = <&i2c0>; 61 mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>; 62 los-gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/broadcom/stingray/ |
D | bcm958742-base.dtsi | 4 * Copyright(c) 2016-2017 Broadcom. All rights reserved. 33 #include "stingray-board-base.dtsi" 37 compatible = "regulator-gpio"; 38 regulator-name = "sdio0_vddo_ctrl_reg"; 39 regulator-type = "voltage"; 40 regulator-min-microvolt = <1800000>; 41 regulator-max-microvolt = <3300000>; 48 compatible = "regulator-gpio"; 49 regulator-name = "sdio1_vddo_ctrl_reg"; 50 regulator-type = "voltage"; [all …]
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/Linux-v6.1/drivers/mtd/nand/ |
D | ecc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Generic Error-Correcting Code (ECC) engine 10 * This file describes the abstraction of any NAND ECC engine. It has been 11 * designed to fit most cases, including parallel NANDs and SPI-NANDs. 15 * - external: The ECC engine is outside the NAND pipeline, typically this 17 * outside the NAND controller pipeline. 18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the 19 * controller's side. This is the case of most of the raw NAND 23 * - ondie: The ECC engine is inside the NAND pipeline, on the chip's side. 24 * Some NAND chips can correct themselves the data. [all …]
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/Linux-v6.1/arch/arm64/boot/dts/broadcom/northstar2/ |
D | ns2-xmc.dts | 33 /dts-v1/; 39 compatible = "brcm,ns2-xmc", "brcm,ns2"; 46 stdout-path = "serial0:115200n8"; 70 gphy0: eth-phy@10 { 76 &nand { 80 nand-ecc-mode = "hw"; 81 nand-ecc-strength = <8>; 82 nand-ecc-step-size = <512>; 83 nand-bus-width = <16>; 84 brcm,nand-oob-sector-size = <16>; [all …]
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D | ns2-svk.dts | 33 /dts-v1/; 39 compatible = "brcm,ns2-svk", "brcm,ns2"; 49 stdout-path = "serial0:115200n8"; 113 spi-max-frequency = <5000000>; 114 spi-cpha; 115 spi-cpol; 118 pl022,slave-tx-disable = <0>; 119 pl022,com-mode = <0>; 120 pl022,rx-level-trig = <1>; 121 pl022,tx-level-trig = <1>; [all …]
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