Searched +full:nand +full:- +full:has +full:- +full:wp (Results 1 – 25 of 52) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/mtd/ |
D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 15 flash chips. It has a memory-mapped register interface for both control 25 -- Additional SoC-specific NAND controller properties -- 27 The NAND controller is integrated differently on the variety of SoCs on which [all …]
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D | nand-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NAND Chip and NAND Controller Generic Binding 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 14 The NAND controller should be represented with its own DT node, and 15 all NAND chips attached to this controller should be defined as 16 children nodes of the NAND controller. This representation should be [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | armada-xp-db-dxbc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree file for DB-DXBC2 board 7 * Based on armada-xp-db.dts 9 * Note: this Device Tree assumes that the bootloader has remapped the 12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 19 /dts-v1/; 20 #include "armada-xp-98dx4251.dtsi" 24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp"; 43 devbus,bus-width = <16>; 44 devbus,turn-off-ps = <60000>; [all …]
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D | kirkwood-pogoplug-series-4.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4 10 /dts-v1/; 13 #include "kirkwood-6192.dtsi" 14 #include <dt-bindings/input/linux-event-codes.h> 18 compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192", 27 stdout-path = "uart0:115200n8"; 31 compatible = "gpio-keys"; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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D | imx31-lite.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 5 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 14 compatible = "logicpd,imx31-lite", "fsl,imx31"; 17 stdout-path = &uart1; 26 compatible = "gpio-leds"; 43 nand-bus-width = <8>; 44 nand-ecc-mode = "hw"; [all …]
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D | imx27-phytec-phycore-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 #include "imx27-phytec-phycore-som.dtsi" 9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; 12 stdout-path = &uart1; 16 model = "Sharp-LQ035Q7"; 17 bits-per-pixel = <16>; 20 display-timings { 21 native-mode = <&timing0>; 23 clock-frequency = <5500000>; 26 hback-porch = <5>; [all …]
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D | armada-370-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6710-BP-DDR3) 9 * Gregory CLEMENT <gregory.clement@free-electrons.com> 10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 * Note: this Device Tree assumes that the bootloader has remapped the 15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 22 /dts-v1/; 23 #include "armada-370.dtsi" 27 compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; 30 stdout-path = "serial0:115200n8"; [all …]
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D | armada-370-rd.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (RD-88F6710-A1) 6 * Copied from arch/arm/boot/dts/armada-370-db.dts 10 * Note: this Device Tree assumes that the bootloader has remapped the 13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 20 /dts-v1/; 21 #include <dt-bindings/input/input.h> 22 #include <dt-bindings/interrupt-controller/irq.h> 23 #include <dt-bindings/gpio/gpio.h> 24 #include "armada-370.dtsi" [all …]
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D | armada-xp-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-78460-BP) 6 * Copyright (C) 2012-2014 Marvell 9 * Gregory CLEMENT <gregory.clement@free-electrons.com> 10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 * Note: this Device Tree assumes that the bootloader has remapped the 16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 23 /dts-v1/; 24 #include "armada-xp-mv78460.dtsi" 28 …compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370… [all …]
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D | imx53-tx53.dtsi | 2 * Copyright 2012-2017 <LW@KARO-electronics.de> 3 * based on imx53-qsb.dts 7 * This file is dual-licensed: you can use it either under the terms 46 #include <dt-bindings/gpio/gpio.h> 49 model = "Ka-Ro electronics TX53 module"; 62 reg-can-xcvr = ®_can_xcvr; 69 clock-frequency = <0>; 73 mclk: clock-mclk { 74 compatible = "fixed-clock"; 75 #clock-cells = <0>; [all …]
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D | omap3-pandora-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/input/input.h> 14 cpu0-supply = <&vcc>; 29 #clock-cells = <0>; 30 compatible = "fixed-clock"; 31 clock-frequency = <26000000>; 35 compatible = "connector-analog-tv"; 40 remote-endpoint = <&venc_out>; 45 gpio-leds { 47 compatible = "gpio-leds"; [all …]
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D | imx28-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 /dts-v1/; 10 compatible = "fsl,imx28-evk", "fsl,imx28"; 18 reg_3p3v: regulator-3p3v { 19 compatible = "regulator-fixed"; 20 regulator-name = "3P3V"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 23 regulator-always-on; 26 reg_vddio_sd0: regulator-vddio-sd0 { [all …]
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D | imx6q-arm2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 13 compatible = "fsl,imx6q-arm2", "fsl,imx6q"; 21 compatible = "simple-bus"; 22 #address-cells = <1>; 23 #size-cells = <0>; 26 compatible = "regulator-fixed"; 28 regulator-name = "3P3V"; 29 regulator-min-microvolt = <3300000>; [all …]
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D | bcm-hr2.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 39 interrupt-parent = <&gic>; 40 #address-cells = <1>; 41 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; 49 compatible = "arm,cortex-a9"; 50 next-level-cache = <&L2>; 56 compatible = "arm,cortex-a9-pmu"; [all …]
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/Linux-v6.1/drivers/mtd/nand/raw/ |
D | nandsim.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * NAND flash simulator. 9 * Note: NS means "NAND Simulator". 132 MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command"); 133 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufact… 134 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID… 135 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete… 136 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolet… 142 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)"); 143 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero"); [all …]
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D | r852.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2009 - Maxim Levitsky 14 /* nand interface + ecc 15 byte write/read does one cycle on nand data lines. 28 /* but has to be set on start...*/ 30 #define R852_CTL_CARDENABLE 0x10 /* probably (#CE) - always set*/ 33 #define R852_CTL_WRITE 0x80 /* set when performing writes (#WP) */ 42 #define R852_CARD_STA_BUSY 0x80 /* card is busy - (#R/B) */ 71 /* physical DMA address - 32 bit value*/ 77 #define R852_DMA_MEMORY 0x01 /* (memory <-> internal hw buffer) */ [all …]
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D | tegra_nand.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de> 10 #include <linux/dma-mapping.h> 34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20) 40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4) 41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0) 156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off)) 207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc() 211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc() 213 oobregion->offset = SKIP_SPARE_BYTES; in tegra_nand_ooblayout_rs_ecc() [all …]
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/Linux-v6.1/arch/arm64/boot/dts/broadcom/bcmbca/ |
D | bcm4908-asus-gt-ac5300.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 10 compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca"; 11 model = "Asus GT-AC5300"; 18 gpio-keys-polled { 19 compatible = "gpio-keys-polled"; 20 poll-interval = <100>; 22 key-wifi { [all …]
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/Linux-v6.1/arch/arm/mach-omap1/ |
D | board-h2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-omap1/board-h2.c 5 * Board specific inits for OMAP-1610 H2 31 #include <linux/omap-dma.h> 32 #include <linux/platform_data/gpio-omap.h> 33 #include <linux/platform_data/keypad-omap.h> 36 #include <asm/mach-types.h> 46 #include "board-h2.h" 49 #define OMAP_GPIO_LABEL "gpio-0-15" 93 /* bootloader (U-Boot, etc) in first sector */ [all …]
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/Linux-v6.1/Documentation/driver-api/ |
D | mtdnand.rst | 2 MTD NAND Driver Programming Interface 10 The generic NAND driver supports almost all NAND and AG-AND based chips 15 board drivers or filesystem drivers suitable for NAND devices. 26 struct member has a short description which is marked with an [XXX] 31 -------------------------- 37 - [MTD Interface] 43 - [NAND Interface] 45 These functions are exported and provide the interface to the NAND 48 - [GENERIC] 53 - [DEFAULT] [all …]
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/Linux-v6.1/drivers/mtd/nand/raw/brcmnand/ |
D | brcmnand.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright © 2010-2015 Broadcom Corporation 17 #include <linux/dma-mapping.h> 36 * This flag controls if WP stays on between erase/write commands to mitigate 94 /* 512B flash cache in the NAND controller HW */ 237 /* List of NAND hosts (one for each chip-select) */ 240 /* EDU info, per-transaction */ 261 /* in-memory cache of the FLASH_CACHE, used only for some commands */ 267 const u8 *cs_offsets; /* within each chip-select */ 277 /* for low-power standby/resume only */ [all …]
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/Linux-v6.1/arch/arm/mach-s3c/ |
D | bast.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright (c) 2003-2004 Simtec Electronics 6 * BAST - CPLD control constants 7 * BAST - IRQ Number definitions 8 * BAST - Memory map definitions 14 /* CTRL1 - Audio LR routing */ 22 /* CTRL2 - NAND WP control, IDE Reset assert/check */ 27 /* CTRL3 - rom write control, CPLD identity */ 32 /* CTRL4 - 8bit LCD interface control/status */ 39 /* CTRL5 - DMA routing */ [all …]
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/Linux-v6.1/arch/powerpc/boot/dts/ |
D | mpc8610_hpcd.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2007-2008 Freescale Semiconductor Inc. 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <0>; 31 d-cache-line-size = <32>; 32 i-cache-line-size = <32>; 33 d-cache-size = <32768>; // L1 [all …]
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/Linux-v6.1/include/linux/mtd/ |
D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> 8 * Contains standard defines and IDs for NAND flash devices 17 #include <linux/mtd/nand.h> 29 /* The maximum number of NAND chips in an array */ 50 * Standard NAND flash commands 73 #define NAND_CMD_NONE -1 82 #define NAND_DATA_IFACE_CHECK_ONLY -1 95 * Enable generic NAND 'page erased' check. This check is only done when 96 * ecc.correct() returns -EBADMSG. [all …]
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/Linux-v6.1/drivers/mfd/ |
D | dm355evm_msp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dm355evm_msp.c - driver for MSP430 firmware on DM355EVM board 23 * EVM board has an MSP430 programmed with firmware for various board 27 * Because this firmware is entirely board-specific, this file embeds 58 /*----------------------------------------------------------------------*/ 65 * dm355evm_msp_write - Writes a register in dm355evm_msp 69 * Returns result of operation - 0 is success, else negative errno 78 * dm355evm_msp_read - Reads a register from dm355evm_msp 81 * Returns result of operation - value, or negative errno 89 /*----------------------------------------------------------------------*/ [all …]
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