| /Linux-v6.1/arch/arm/common/ |
| D | mcpm_head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * arch/arm/common/mcpm_head.S -- kernel entry point for multi-cluster PM 6 * Copyright: (C) 2012-2013 Linaro Limited 8 * Refer to Documentation/arm/cluster-pm-race-avoidance.rst 26 1903: .asciz " cluster" 54 ubfx r10, r0, #8, #8 @ r10 = cluster 86 mla r8, r0, r10, r8 @ r8 = sync cluster base 94 @ At this point, the cluster cannot unexpectedly enter the GOING_DOWN 98 mla r11, r0, r10, r11 @ r11 = cluster first man lock 104 bne mcpm_setup_wait @ wait for cluster setup if so [all …]
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| D | mcpm_entry.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch/arm/common/mcpm_entry.c -- entry point for multi-cluster PM 6 * Copyright: (C) 2012-2013 Linaro Limited 24 * see Documentation/arm/cluster-pm-race-avoidance.rst. 34 static void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_going_down() argument 36 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN; in __mcpm_cpu_going_down() 37 sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu); in __mcpm_cpu_going_down() 42 * cluster can be torn down without disrupting this CPU. 47 static void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_down() argument 50 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN; in __mcpm_cpu_down() [all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 6 1 - Introduction 12 - socket 13 - cluster 14 - core 15 - thread 18 symmetric multi-threading (SMT) is supported or not. 29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be 39 2 - cpu-map node 42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct 46 - cpu-map node [all …]
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| /Linux-v6.1/arch/arm/mach-sunxi/ |
| D | mc_smp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2018 Chen-Yu Tsai 5 * Chen-Yu Tsai <wens@csie.org> 7 * arch/arm/mach-sunxi/mc_smp.c 9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and 10 * arch/arm/mach-hisi/platmcpm.c 11 * Cluster cache enable trampoline code adapted from MCPM framework 14 #include <linux/arm-cci.h> 19 #include <linux/irqchip/arm-gic.h> 71 /* R_CPUCFG registers, specific to sun8i-a83t */ [all …]
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| /Linux-v6.1/Documentation/admin-guide/perf/ |
| D | hisi-pmu.rst | 10 The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster 12 called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has 13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively. 16 ------------------------------- 28 name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>. 29 where "sccl-id" is the identifier of the SCCL and "index-id" is the index of 45 ------------------------------------------ 47 ------------------------------------------ 49 ------------------------------------------ 51 ------------------------------------------ [all …]
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| /Linux-v6.1/Documentation/arm/ |
| D | cluster-pm-race-avoidance.rst | 2 Cluster-wide Power-up/power-down race avoidance algorithm 6 cluster setup and teardown operations and to manage hardware coherency 16 --------- 29 cluster-level operations are only performed when it is truly safe to do 34 are not immediately enabled when a cluster powers up. Since enabling or 35 disabling those mechanisms may itself be a non-atomic operation (such as 38 power-down and power-up at the cluster level. 46 ----------- 48 Each cluster and CPU is assigned a state, as follows: 50 - DOWN [all …]
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| /Linux-v6.1/arch/arm/mach-versatile/ |
| D | spc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/clk-provider.h> 28 #define SPCLOG "vexpress-spc: " 39 /* SPC wake-up IRQs status and mask */ 46 /* SPC per-CPU mailboxes */ 50 /* SPC CPU/cluster reset statue */ 68 /* wake-up interrupt masks */ 71 /* TC2 static dual-cluster configuration */ 75 * Even though the SPC takes max 3-5 ms to complete any OPP/COMMS 97 * A15s cluster identifier [all …]
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| D | platsmp-vexpress.c | 1 // SPDX-License-Identifier: GPL-2.0-only 27 * The best way to detect a multi-cluster configuration in vexpress_smp_init_ops() 40 cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); in vexpress_smp_init_ops() 57 { .compatible = "arm,cortex-a5-scu", }, 58 { .compatible = "arm,cortex-a9-scu", }, 72 * system-wide flags register. The boot monitor waits in vexpress_smp_dt_prepare_cpus()
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| /Linux-v6.1/drivers/gpu/drm/rockchip/ |
| D | rockchip_vop2_reg.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Andy Yan <andy.yan@rock-chips.com> 126 * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win. 127 * Every cluster can work as 4K win or split into two win. 128 * All win in cluster support AFBCD. 130 * Every esmart win and smart win support 4 Multi-region. 134 * * Cluster: bicubic for horizontal scale up, others use bilinear 136 * * nearest-neighbor/bilinear/bicubic for scale up 137 * * nearest-neighbor/bilinear/average for scale down 140 * @TODO describe the wind like cpu-map dt nodes; [all …]
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| /Linux-v6.1/drivers/perf/ |
| D | qcom_l2_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved. 26 #include <soc/qcom/kryo-l2-accessors.h> 121 * The cache is made up of one or more clusters, each cluster has its own PMU. 122 * Each cluster is associated with one or more CPUs. 125 * Events can be envisioned as a 2-dimensional array. Each column represents 143 /* The CPU that is used for collecting events on this cluster */ 145 /* All the CPUs associated with this cluster */ 166 return *per_cpu_ptr(l2cache_pmu->pmu_cluster, cpu); in get_cluster_pmu() 243 static void cluster_pmu_set_resr(struct cluster_pmu *cluster, in cluster_pmu_set_resr() argument [all …]
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| /Linux-v6.1/arch/mips/kernel/ |
| D | smp-cps.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 18 #include <asm/mips-cps.h> 21 #include <asm/pm-cps.h> 23 #include <asm/smp-cps.h> 39 static unsigned core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument 44 return mips_cps_numvps(cluster, core); in core_vpe_count() 70 /* Use the number of VPEs in cluster 0 core 0 for smp_num_siblings */ in cps_smp_setup() 74 for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) { in cps_smp_setup() 113 /* If we have an FPU, enroll ourselves in the FPU-full mask */ in cps_smp_setup() 127 /* Detect whether the CCA is unsuited to multi-core SMP */ in cps_prepare_cpus() [all …]
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| D | mips-cm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <asm/mips-cps.h> 193 return (cmgcr & MIPS_CMGCRF_BASE) << (36 - 32); in __mips_cm_phys_base() 204 * If the L2-only sync region is already enabled then leave it at it's in __mips_cm_l2sync_phys_base() 223 /* L2-only sync was introduced with CM major revision 6 */ in mips_cm_probe_l2sync() 257 return -ENODEV; in mips_cm_probe() 261 return -ENXIO; in mips_cm_probe() 270 return -ENODEV; in mips_cm_probe() 286 /* probe for an L2-only sync region */ in mips_cm_probe() 298 void mips_cm_lock_other(unsigned int cluster, unsigned int core, in mips_cm_lock_other() argument [all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/arm/ |
| D | arm,cci-400.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 13 ARM multi-cluster systems maintain intra-cluster coherency through a cache 24 pattern: "^cci(@[0-9a-f]+)?$" 28 - arm,cci-400 29 - arm,cci-500 30 - arm,cci-550 [all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,spm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 20 - enum: 21 - qcom,sdm660-gold-saw2-v4.1-l2 22 - qcom,sdm660-silver-saw2-v4.1-l2 23 - qcom,msm8998-gold-saw2-v4.1-l2 24 - qcom,msm8998-silver-saw2-v4.1-l2 [all …]
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| /Linux-v6.1/fs/exfat/ |
| D | exfat_fs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. 67 #define MAX_CHARSET_SIZE 6 /* max size of multi-byte character */ 74 #define EXFAT_HINT_NONE -1 78 * helpers for cluster size to byte conversion. 80 #define EXFAT_CLU_TO_B(b, sbi) ((b) << (sbi)->cluster_size_bits) 81 #define EXFAT_B_TO_CLU(b, sbi) ((b) >> (sbi)->cluster_size_bits) 83 (((b - 1) >> (sbi)->cluster_size_bits) + 1) 84 #define EXFAT_CLU_OFFSET(off, sbi) ((off) & ((sbi)->cluster_size - 1)) 89 #define EXFAT_BLK_TO_B(b, sb) ((b) << (sb)->s_blocksize_bits) [all …]
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| /Linux-v6.1/fs/erofs/ |
| D | erofs_fs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR Apache-2.0 */ 3 * EROFS (Enhanced ROM File System) on-disk format definition 5 * Copyright (C) 2017-2018 HUAWEI, Inc. 51 /* erofs on-disk super block (currently 128 bytes) */ 60 __le64 inos; /* total valid ino # (== f_files - f_favail) */ 67 __u8 uuid[16]; /* 128-bit uuid for volume */ 84 * erofs inode datalayout (i_format in on-disk inode): 85 * 0 - uncompressed flat inode without tail-packing inline data: 86 * inode, [xattrs], ... | ... | no-holed data 87 * 1 - compressed inode with non-compact indexes: [all …]
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| /Linux-v6.1/drivers/bus/ |
| D | arm-cci.c | 17 #include <linux/arm-cci.h> 49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA }, 52 { .compatible = "arm,cci-500", }, 53 { .compatible = "arm,cci-550", }, 59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base), 60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base), 61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base), 62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base), 63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base), 67 #define DRIVER_NAME "ARM-CCI" [all …]
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| /Linux-v6.1/Documentation/filesystems/ |
| D | f2fs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 WHAT IS Flash-Friendly File System (F2FS)? 7 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have 13 F2FS is a file system exploiting NAND flash memory-based storage devices, which 14 is based on Log-structured File System (LFS). The design has been focused on 18 Since a NAND flash memory-based storage device shows different characteristic 20 F2FS and its tools support various parameters not only for configuring on-disk 26 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git 30 - linux-f2fs-devel@lists.sourceforge.net 35 Log-structured File System (LFS) [all …]
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| /Linux-v6.1/drivers/acpi/ |
| D | pptt.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * pptt.c - parsing of Processor Properties Topology Table (PPTT) 33 if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) in fetch_pptt_subtable() 38 if (entry->length == 0) in fetch_pptt_subtable() 41 if (pptt_ref + entry->length > table_hdr->length) in fetch_pptt_subtable() 65 if (resource >= node->number_of_priv_resources) in acpi_get_pptt_resource() 81 * acpi_pptt_walk_cache() - Attempt to find the requested acpi_pptt_cache 109 if (res->type != ACPI_PPTT_TYPE_CACHE) in acpi_pptt_walk_cache() 117 cache->flags & ACPI_PPTT_CACHE_TYPE_VALID && in acpi_pptt_walk_cache() 118 acpi_pptt_match_type(cache->attributes, type)) { in acpi_pptt_walk_cache() [all …]
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| /Linux-v6.1/drivers/media/v4l2-core/ |
| D | v4l2-ctrls-api.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2010-2021 Hans Verkuil <hverkuil-cisco@xs4all.nl> 8 #define pr_fmt(fmt) "v4l2-ctrls: " fmt 13 #include <media/v4l2-ctrls.h> 14 #include <media/v4l2-dev.h> 15 #include <media/v4l2-device.h> 16 #include <media/v4l2-event.h> 17 #include <media/v4l2-ioctl.h> 19 #include "v4l2-ctrls-priv.h" 29 * same cluster, or 0 if there isn't any. [all …]
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| /Linux-v6.1/fs/ntfs/ |
| D | layout.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * layout.h - All NTFS associated on-disk structures. Part of the Linux-NTFS 6 * Copyright (c) 2001-2005 Anton Altaparmakov 39 u8 sectors_per_cluster; /* Size of a cluster in sectors. */ 71 approx. 4.7x10^21 bytes. (-; */ 72 sle64 mft_lcn; /* Cluster location of mft data. */ 73 sle64 mftmirr_lcn; /* Cluster location of copy of mft. */ 104 magic_BAAD = cpu_to_le32(0x44414142), /* Failed multi sector 117 * operator! (-8 163 * been written to disk. The values 0 and -1 (ie. 0xffff) are not used. All [all …]
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| /Linux-v6.1/drivers/md/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 30 Software RAID mini-HOWTO, available from 45 a several-second delay in the boot time due to various 55 use the so-called linear mode, i.e. it will combine the hard disk 64 tristate "RAID-0 (striping) mode" 68 use the so-called raid0 mode, i.e. it will combine the hard disk 74 Software-RAID mini-HOWTO, available from 84 tristate "RAID-1 (mirroring) mode" 87 A RAID-1 set consists of several disk drives which are exact copies 92 of a single drive, and the set protects against a failure of (N - 1) [all …]
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| /Linux-v6.1/drivers/block/paride/ |
| D | pd.c | 2 pd.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 5 This is the high-level driver for parallel port IDE hard 17 drive1 1-8 integers as follows: 37 <mod> this can be -1 to choose the best mode, or one 39 (-1 if not given) 52 go more slowly. -1 sets a default value that 56 this to zero will speed up the device. (default -1) 60 choose the slave, -1 (the default) to choose the 74 cluster The driver will attempt to aggregate requests 75 for adjacent blocks into larger multi-block [all …]
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| D | pf.c | 2 pf.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 5 This is the high-level driver for parallel port ATAPI disk 17 drive1 1-7 integers as follows: 37 <mod> this can be -1 to choose the best mode, or one 39 (-1 if not given) 43 choose the slave, -1 (the default) to choose the 53 LUN. (default -1) 56 go more slowly. -1 sets a default value that 60 this to zero will speed up the device. (default -1) 72 cluster The driver will attempt to aggregate requests [all …]
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| /Linux-v6.1/Documentation/arm/samsung/ |
| D | bootloader-interface.rst | 14 In the document "boot loader" means any of following: U-boot, proprietary 19 1. Non-Secure mode 65 3. Other (regardless of secure/non-secure mode) 72 0x0908 Non-zero Secondary CPU boot up indicator 79 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other 81 MCPM - Multi-Cluster Power Management
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