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/Linux-v5.15/drivers/media/dvb-frontends/drx39xyj/
Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
60 * Allowed address formats
66 * The DAP FASI offers long address format (4 bytes) and short address format
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
113 * + multi master mode means use of repeated starts
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/Linux-v5.15/arch/arm/boot/dts/
Darmada-385-turris-omnia.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/leds/common.h>
16 #include "armada-385.dtsi"
20 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
23 stdout-path = &uart0;
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Domap3-echo.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
14 compatible = "amazon,omap3-echo", "ti,omap3630", "ti,omap3";
18 cpu0-supply = <&vdd1_reg>;
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
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Daspeed-bmc-facebook-cloudripper.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include <dt-bindings/leds/common.h>
7 #include "ast2600-facebook-netbmc-common.dtsi"
11 compatible = "facebook,cloudripper-bmc", "aspeed,ast2600";
15 * PCA9548 (1-0070) provides 8 channels connecting to
28 * PCA9548 (2-0070) provides 8 channels connecting to
41 * PCA9548 (3-0070) provides 8 channels connecting to
54 * PCA9548 (8-0070) provides 8 channels connecting to
67 * PCA9548 (15-0076) provides 8 channels connecting to
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/Linux-v5.15/Documentation/devicetree/bindings/leds/
Dleds-lp50xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dan Murphy <dmurphy@ti.com>
13 The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into
27 - ti,lp5009
28 - ti,lp5012
29 - ti,lp5018
30 - ti,lp5024
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Dcznic,turris-omnia-leds.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/cznic,turris-omnia-leds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Behún <kabel@kernel.org>
20 const: cznic,turris-omnia-leds
23 description: I2C slave address of the microcontroller.
26 "#address-cells":
29 "#size-cells":
33 "^multi-led@[0-9a-b]$":
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/Linux-v5.15/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
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Dmxic-nand.txt2 -------------------------------------------------
5 - compatible: should be "mxic,multi-itfc-v009-nand-controller"
6 - reg: should contain 1 entry for the registers
7 - #address-cells: should be set to 1
8 - #size-cells: should be set to 0
9 - interrupts: interrupt line connected to this raw NAND controller
10 - clock-names: should contain "ps", "send" and "send_dly"
11 - clocks: should contain 3 phandles for the "ps", "send" and
15 - children nodes represent the available NAND chips.
17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml
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/Linux-v5.15/Documentation/userspace-api/media/v4l/
Dplanar-apis.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _planar-apis:
6 Single- and multi-planar APIs
11 has to be addressed using more than one memory address, i.e. one pointer
12 per "plane". A plane is a sub-buffer of the current frame. For examples
15 Initially, V4L2 API did not support multi-planar buffers and a set of
17 constitute what is being referred to as the "multi-planar API".
20 depending on whether single- or multi-planar API is being used. An
22 corresponding buffer type to its ioctl calls. Multi-planar versions of
24 available multi-planar buffer types see enum
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Dfunc-mmap.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _func-mmap:
13 v4l2-mmap - Map device memory into application address space
18 .. code-block:: c
29 Map the buffer to this address in the application's address space.
32 address cannot be used. Use of this option is discouraged;
39 single-planar API, and the same value as returned by the driver in
41 the multi-planar API.
69 ``MAP_FIXED`` requests that the driver selects no other address than
70 the one specified. If the specified address cannot be used,
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/Linux-v5.15/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-qmss.txt5 multi-core Navigator. QMSS consist of queue managers, packed-data structure
9 management of the packet queues. Packets are queued/de-queued by writing or
10 reading descriptor address to a particular memory mapped location. The PDSPs
20 - compatible : Must be "ti,keystone-navigator-qmss".
21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
22 - clocks : phandle to the reference clock for this device.
23 - queue-range : <start number> total range of queue numbers for the device.
24 - linkram0 : <address size> for internal link ram, where size is the total
26 - linkram1 : <address size> for external link ram, where size is the total
27 external link ram entries. If the address is specified as "0"
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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dfsl-usb.txt9 - compatible : Should be "fsl-usb2-mph" for multi port host USB
10 controllers, or "fsl-usb2-dr" for dual role USB controllers
11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
14 - phy_type : For multi port host USB controllers, should be one of
17 - reg : Offset and length of the register set for the device
18 - port0 : boolean; if defined, indicates port0 is connected for
19 fsl-usb2-mph compatible controllers. Either this property or
20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible
22 - port1 : boolean; if defined, indicates port1 is connected for
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/Linux-v5.15/Documentation/s390/
Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Pierre Morel
17 -----------------------
28 ---------------
36 - /sys/kernel/debug/s390dbf/pci_msg/sprintf
56 - /sys/bus/pci/slots/XXXXXXXX/power
64 - function_id
67 - function_handle
68 Low-level identifier used for a configured PCI function.
71 - pchid
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/Linux-v5.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dcpm.txt10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
11 - reg : A 48-byte region beginning with CPCR.
15 #address-cells = <1>;
16 #size-cells = <1>;
17 #interrupt-cells = <2>;
18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
24 - fsl,cpm-command : This value is ORed with the opcode and command flag
27 - fsl,cpm-brg : Indicates which baud rate generator the device
32 - reg : Unless otherwise specified, the first resource represents the
36 * Multi-User RAM (MURAM)
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/Linux-v5.15/drivers/soc/fsl/qe/
Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
41 /* max address size we deal with */
57 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
60 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init()
63 ret = -ENODEV; in cpm_muram_init()
68 muram_pool = gen_pool_create(0, -1); in cpm_muram_init()
71 ret = -ENOMEM; in cpm_muram_init()
77 ret = -ENODEV; in cpm_muram_init()
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/Linux-v5.15/arch/sh/mm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
9 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
12 On other systems (such as the SH-3 and 4) where an MMU exists,
45 hex "Physical memory start address"
49 map the ROM starting at address zero. But the processor
52 The physical memory (RAM) start address will be automatically
81 bool "Support 32-bit physical addressing through PMB"
87 32-bits through the SH-4A PMB. If this is not set, legacy
88 29-bit physical addressing will be used.
108 bool "Non-Uniform Memory Access (NUMA) Support"
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/Linux-v5.15/Documentation/devicetree/bindings/arm/freescale/
Dm4if.txt1 * Freescale Multi Master Multi Memory Interface (M4IF) module
4 - compatible : Should be "fsl,imx51-m4if"
5 - reg : Address and length of the register set for the device
10 compatible = "fsl,imx51-m4if";
/Linux-v5.15/arch/sparc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
157 bool "Symmetric multi-processing support"
163 If you say N here, the kernel will run on uni- and multiprocessor
173 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
226 bool "Support for hot-pluggable CPUs"
238 tristate "UltraSPARC-III Memory Controller driver"
242 This adds a driver for the UltraSPARC-III memory controller.
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/Linux-v5.15/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
61 --------------------------
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/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dsprd-mcdt.txt1 Spreadtrum Multi-Channel Data Transfer Binding
3 The Multi-channel data transfer controller is used for sound stream
9 - compatible: Should be "sprd,sc9860-mcdt".
10 - reg: Should contain registers address and length.
11 - interrupts: Should contain one interrupt shared by all channel.
16 compatible = "sprd,sc9860-mcdt";
/Linux-v5.15/Documentation/devicetree/bindings/mfd/
Dbrcm,iproc-mhb.txt1 Broadcom iProc Multi Host Bridge (MHB)
3 Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls
10 - compatible: should contain:
11 "brcm,sr-mhb", "syscon" for Stingray
12 - reg: base address and range of the MHB registers
16 compatible = "brcm,sr-mhb", "syscon";
Dretu.txt1 * Device tree bindings for Nokia Retu and Tahvo multi-function device
3 Retu and Tahvo are a multi-function devices found on Nokia Internet
9 - compatible: "nokia,retu" or "nokia,tahvo"
10 - reg: Specifies the CBUS slave address of the ASIC chip
11 - interrupts: The interrupt line the device is connected to
16 compatible = "i2c-cbus-gpio";
20 interrupt-parent = <&gpio4>;
/Linux-v5.15/drivers/isdn/hardware/mISDN/
Dhfc_multi_8xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_outb_embsd()
26 writeb(reg, hc->xhfc_memaddr); in HFC_outb_embsd()
27 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_outb_embsd()
28 writeb(val, hc->xhfc_memdata); in HFC_outb_embsd()
37 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inb_embsd()
38 writeb(reg, hc->xhfc_memaddr); in HFC_inb_embsd()
39 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_inb_embsd()
40 return readb(hc->xhfc_memdata); in HFC_inb_embsd()
49 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inw_embsd()
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/Linux-v5.15/arch/m68k/include/uapi/asm/
Dbootinfo-mac.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 ** asm/bootinfo-mac.h -- Macintosh-specific boot information definitions
11 * Macintosh-specific tags (all __be32)
15 #define BI_MAC_VADDR 0x8001 /* Mac video base address */
20 #define BI_MAC_SCCBASE 0x8006 /* Mac SCC base address */
25 #define BI_MAC_ROMBASE 0x800b /* Mac system ROM base address */
29 * Macintosh hardware profile data - unused, see macintosh.h for
33 #define BI_MAC_VIA1BASE 0x8010 /* Mac VIA1 base address (always present) */
34 #define BI_MAC_VIA2BASE 0x8011 /* Mac VIA2 base address (type varies) */
37 #define BI_MAC_ASCBASE 0x8014 /* Mac Apple Sound Chip base address */
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/Linux-v5.15/Documentation/devicetree/bindings/media/
Ds5p-mfc.txt1 * Samsung Multi Format Codec (MFC)
3 Multi Format Codec (MFC) is the IP present in Samsung SoCs which
10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
18 - reg : Physical base address of the IP registers and length of memory
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