Searched +full:mt8195 +full:- +full:power +full:- +full:controller (Results 1 – 25 of 37) sorted by relevance
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/Linux-v6.6/Documentation/devicetree/bindings/mfd/ |
D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 14 power management tasks. The tasks include MTCMOS power 20 - enum: 21 - mediatek,mt8167-scpsys 22 - mediatek,mt8173-scpsys 23 - mediatek,mt8183-scpsys [all …]
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/Linux-v6.6/arch/arm64/boot/dts/mediatek/ |
D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/media/ |
D | mediatek,mt8195-jpegenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com> 17 const: mediatek,mt8195-jpgenc 19 power-domains: 29 "#address-cells": 32 "#size-cells": 39 "^jpgenc@[0-9a-f]+$": [all …]
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D | mediatek,mt8195-jpegdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com> 17 const: mediatek,mt8195-jpgdec 19 power-domains: 29 "#address-cells": 32 "#size-cells": 39 "^jpgdec@[0-9a-f]+$": [all …]
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D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 +------------------------------------------------+-------------------------------------+ 22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | 24 +------------||-------------||-------------------+---------------------||--------------+ 26 -------------||-------------||-------------------|---------------------||--------------- 27 ||<------------||----------------HW index---------------->|| <child> [all …]
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D | mediatek,vcodec-encoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 - mediatek,mt8173-vcodec-enc-vp8 21 - mediatek,mt8173-vcodec-enc 22 - mediatek,mt8183-vcodec-enc 23 - mediatek,mt8188-vcodec-enc 24 - mediatek,mt8192-vcodec-enc [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/arm/mediatek/ |
D | mediatek,mmsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek mmsys controller 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 The MediaTek mmsys system controller provides clock control, routing control, 18 pattern: "^syscon@[0-9a-f]+$" 22 - items: 23 - enum: 24 - mediatek,mt2701-mmsys [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,dsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: mediatek display DSC controller 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 17 video bit stream. DSC is designed for real-time systems with 18 real-time compression, transmission, decompression and Display. 23 - enum: 24 - mediatek,mt8195-disp-dsc [all …]
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D | mediatek,dp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek Display Port Controller 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Jitao shi <jitao.shi@mediatek.com> 17 In addition, We just need to enable the power domain of DP, so the clock 24 - mediatek,mt8195-dp-tx 25 - mediatek,mt8195-edp-tx 30 nvmem-cells: [all …]
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D | mediatek,mdp-rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 It provides real time data to the back-end panel driver, such as DSI, 24 const: mediatek,mt8195-vdo1-rdma 32 power-domains: 37 - description: RDMA Clock [all …]
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D | mediatek,ethdr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 21 These two function blocks read the pre-programmed registers from DRAM and 22 set them to HW in the v-blanking period. 26 const: mediatek,mt8195-disp-ethdr 31 reg-names: 33 - const: mixer [all …]
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D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 data into DMA. It provides real time data to the back-end panel 26 - enum: 27 - mediatek,mt2701-disp-rdma 28 - mediatek,mt8173-disp-rdma 29 - mediatek,mt8183-disp-rdma [all …]
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D | mediatek,merge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line 15 inputs into one side-by-side output. 24 - enum: 25 - mediatek,mt8173-disp-merge 26 - mediatek,mt8195-disp-merge [all …]
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D | mediatek,aal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 is responsible for backlight power saving and sunlight visibility improving. 24 - enum: 25 - mediatek,mt8173-disp-aal 26 - mediatek,mt8183-disp-aal 27 - items: [all …]
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D | mediatek,gamma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 24 - enum: 25 - mediatek,mt8173-disp-gamma 26 - mediatek,mt8183-disp-gamma 27 - items: 28 - enum: [all …]
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D | mediatek,ccorr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 24 - enum: 25 - mediatek,mt8183-disp-ccorr 26 - mediatek,mt8192-disp-ccorr 27 - items: 28 - enum: [all …]
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D | mediatek,dither.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 25 - enum: 26 - mediatek,mt8183-disp-dither 27 - items: 28 - enum: 29 - mediatek,mt8186-disp-dither [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/usb/ |
D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/dsp/ |
D | mediatek,mt8195-dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek mt8195 DSP core 10 - YC Hung <yc.hung@mediatek.com> 13 Some boards from mt8195 contain a DSP core used for 14 advanced pre- and post- audio processing. 18 const: mediatek,mt8195-dsp 22 - description: Address and size of the DSP Cfg registers [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/sound/ |
D | mt8195-afe-pcm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek AFE PCM controller for mt8195 10 - Trevor Wu <trevor.wu@mediatek.com> 14 const: mediatek,mt8195-audio 25 reset-names: 28 memory-region: 31 Shared memory region for AFE memif. A "shared-dma-pool". [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/power/ |
D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek Power Domains Controller 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 11 - Matthias Brugger <mbrugger@suse.com> 14 Mediatek processors include support for multiple power domains which can be 15 powered up/down by software based on different application scenes to save power. 17 IP cores belonging to a power domain should contain a 'power-domains' [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/net/ |
D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DWMAC glue layer controller 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/soc/mediatek/ |
D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex 30 - mediatek,mt8167-disp-mutex [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/iommu/ |
D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yong Wu <yong.wu@mediatek.com> 16 ARM Short-Descriptor translation table format for address translation. 24 +--------+ 26 gals0-rx gals1-rx (Global Async Local Sync rx) 29 gals0-tx gals1-tx (Global Async Local Sync tx) 31 +--------+ 35 +----------------+------- [all …]
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/Linux-v6.6/drivers/usb/host/ |
D | xhci-mtk.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * MediaTek xHCI Host Controller Driver 10 #include <linux/dma-mapping.h> 24 #include "xhci-mtk.h" 99 /* mt8195 */ 122 SSUSB_UWK_V1_3, /* mt8195 IP0 */ 123 SSUSB_UWK_V1_4, /* mt8195 IP1 */ 124 SSUSB_UWK_V1_5, /* mt8195 IP2 */ 125 SSUSB_UWK_V1_6, /* mt8195 IP3 */ 129 * MT8195 has 4 controllers, the controller1~3's default SOF/ITP interval [all …]
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