Searched +full:msiof +full:- +full:r8a7791 (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas MSIOF SPI controller10 - Geert Uytterhoeven <geert+renesas@glider.be>13 - $ref: spi-controller.yaml#18 - items:19 - const: renesas,msiof-sh73a0 # SH-Mobile AG520 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car M2-W (R8A77910) SoC5 * Copyright (C) 2013-2015 Renesas Electronics Corporation6 * Copyright (C) 2013-2014 Renesas Solutions Corp.10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/interrupt-controller/irq.h>13 #include <dt-bindings/power/r8a7791-sysc.h>16 compatible = "renesas,r8a7791";17 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * SuperH MSIOF SPI Controller Interface7 * Copyright (C) 2014-2017 Glider bvba14 #include <linux/dma-mapping.h>87 #define SIMDR1_SYNCAC_SHIFT 25 /* Sync Polarity (1 = Active-low) */91 #define SIMDR1_FLD_MASK GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */100 #define SIMDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */101 #define SIMDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */105 #define SISCR_BRPS_MASK GENMASK(12, 8) /* Prescaler Setting (1-32) */106 #define SISCR_BRPS(i) (((i) - 1) << 8)[all …]
