| /Linux-v5.10/arch/powerpc/sysdev/ |
| D | mpic.c | 2 * arch/powerpc/kernel/mpic.c
5 * common implementation being IBM's MPIC. This driver also can deal
39 #include <asm/mpic.h>
42 #include "mpic.h"
51 .name = "mpic",
52 .dev_name = "mpic",
56 static struct mpic *mpics;
57 static struct mpic *mpic_primary;
70 [0] = { /* Original OpenPIC compatible MPIC */
150 #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]
[all …]
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| D | fsl_mpic_err.c | 14 #include <asm/mpic.h>
16 #include "mpic.h"
35 struct mpic *mpic = irq_data_get_irq_chip_data(d); in fsl_mpic_mask_err() local
36 unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0]; in fsl_mpic_mask_err()
38 eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR); in fsl_mpic_mask_err()
40 mpic_fsl_err_write(mpic->err_regs, eimr); in fsl_mpic_mask_err()
46 struct mpic *mpic = irq_data_get_irq_chip_data(d); in fsl_mpic_unmask_err() local
47 unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0]; in fsl_mpic_unmask_err()
49 eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR); in fsl_mpic_unmask_err()
51 mpic_fsl_err_write(mpic->err_regs, eimr); in fsl_mpic_unmask_err()
[all …]
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| D | mpic.h | 10 extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
11 extern int mpic_msi_init_allocator(struct mpic *mpic);
12 extern int mpic_u3msi_init(struct mpic *mpic);
14 static inline void mpic_msi_reserve_hwirq(struct mpic *mpic, in mpic_msi_reserve_hwirq() argument
20 static inline int mpic_u3msi_init(struct mpic *mpic) in mpic_u3msi_init() argument
27 int mpic_pasemi_msi_init(struct mpic *mpic);
29 static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; } in mpic_pasemi_msi_init() argument
39 extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
40 extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
41 extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
[all …]
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| D | mpic_msi.c | 9 #include <asm/mpic.h>
15 #include <sysdev/mpic.h>
17 void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) in mpic_msi_reserve_hwirq() argument
19 /* The mpic calls this even when there is no allocator setup */ in mpic_msi_reserve_hwirq()
20 if (!mpic->msi_bitmap.bitmap) in mpic_msi_reserve_hwirq()
23 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); in mpic_msi_reserve_hwirq()
27 static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) in mpic_msi_reserve_u3_hwirqs() argument
30 const struct irq_domain_ops *ops = mpic->irqhost->ops; in mpic_msi_reserve_u3_hwirqs()
35 pr_debug("mpic: found U3, guessing msi allocator setup\n"); in mpic_msi_reserve_u3_hwirqs()
44 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); in mpic_msi_reserve_u3_hwirqs()
[all …]
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| /Linux-v5.10/arch/powerpc/boot/dts/fsl/ |
| D | mpc8641_hpcn_36b.dts | 135 0x8800 0 0 1 &mpic 2 1 0 0
136 0x8800 0 0 2 &mpic 3 1 0 0
137 0x8800 0 0 3 &mpic 4 1 0 0
138 0x8800 0 0 4 &mpic 1 1 0 0
141 0x8900 0 0 1 &mpic 2 1 0 0
142 0x8900 0 0 2 &mpic 3 1 0 0
143 0x8900 0 0 3 &mpic 4 1 0 0
144 0x8900 0 0 4 &mpic 1 1 0 0
147 0x8a00 0 0 1 &mpic 2 1 0 0
148 0x8a00 0 0 2 &mpic 3 1 0 0
[all …]
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| D | mpc8540ads.dts | 68 interrupt-parent = <&mpic>;
74 interrupt-parent = <&mpic>;
83 interrupt-parent = <&mpic>;
94 interrupt-parent = <&mpic>;
110 interrupt-parent = <&mpic>;
118 interrupt-parent = <&mpic>;
126 interrupt-parent = <&mpic>;
134 interrupt-parent = <&mpic>;
150 interrupt-parent = <&mpic>;
161 interrupt-parent = <&mpic>;
[all …]
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| D | mpc8641_hpcn.dts | 168 0x8800 0 0 1 &mpic 2 1 0 0
169 0x8800 0 0 2 &mpic 3 1 0 0
170 0x8800 0 0 3 &mpic 4 1 0 0
171 0x8800 0 0 4 &mpic 1 1 0 0
174 0x8900 0 0 1 &mpic 2 1 0 0
175 0x8900 0 0 2 &mpic 3 1 0 0
176 0x8900 0 0 3 &mpic 4 1 0 0
177 0x8900 0 0 4 &mpic 1 1 0 0
180 0x8a00 0 0 1 &mpic 2 1 0 0
181 0x8a00 0 0 2 &mpic 3 1 0 0
[all …]
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| D | mpc8548cds.dtsi | 172 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
173 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
174 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
175 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
178 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
179 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
180 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
181 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
184 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
185 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
[all …]
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| D | mpc8560ads.dts | 68 interrupt-parent = <&mpic>;
74 interrupt-parent = <&mpic>;
83 interrupt-parent = <&mpic>;
99 interrupt-parent = <&mpic>;
107 interrupt-parent = <&mpic>;
115 interrupt-parent = <&mpic>;
123 interrupt-parent = <&mpic>;
139 interrupt-parent = <&mpic>;
150 interrupt-parent = <&mpic>;
155 interrupt-parent = <&mpic>;
[all …]
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| D | mpc8572ds.dtsi | 250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
252 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
253 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
258 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
259 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
263 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
[all …]
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| D | mpc8541cds.dts | 68 interrupt-parent = <&mpic>;
74 interrupt-parent = <&mpic>;
83 interrupt-parent = <&mpic>;
94 interrupt-parent = <&mpic>;
110 interrupt-parent = <&mpic>;
118 interrupt-parent = <&mpic>;
126 interrupt-parent = <&mpic>;
134 interrupt-parent = <&mpic>;
150 interrupt-parent = <&mpic>;
161 interrupt-parent = <&mpic>;
[all …]
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| D | mpc8555cds.dts | 68 interrupt-parent = <&mpic>;
74 interrupt-parent = <&mpic>;
83 interrupt-parent = <&mpic>;
94 interrupt-parent = <&mpic>;
110 interrupt-parent = <&mpic>;
118 interrupt-parent = <&mpic>;
126 interrupt-parent = <&mpic>;
134 interrupt-parent = <&mpic>;
150 interrupt-parent = <&mpic>;
161 interrupt-parent = <&mpic>;
[all …]
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| /Linux-v5.10/arch/powerpc/boot/dts/ |
| D | stxssa8555.dts | 67 interrupt-parent = <&mpic>;
73 interrupt-parent = <&mpic>;
82 interrupt-parent = <&mpic>;
93 interrupt-parent = <&mpic>;
109 interrupt-parent = <&mpic>;
117 interrupt-parent = <&mpic>;
125 interrupt-parent = <&mpic>;
133 interrupt-parent = <&mpic>;
149 interrupt-parent = <&mpic>;
160 interrupt-parent = <&mpic>;
[all …]
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| D | mvme5100.dts | 62 interrupt-parent = <&mpic>;
73 interrupt-parent = <&mpic>;
76 mpic: interrupt-controller@f3f80000 { label
98 interrupt-parent = <&mpic>;
112 0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
113 0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
114 0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
115 0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
120 0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
121 0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
[all …]
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| D | mpc8610_hpcd.dts | 54 interrupt-parent = <&mpic>;
108 interrupt-parent = <&mpic>;
139 interrupt-parent = <&mpic>;
149 interrupt-parent = <&mpic>;
167 interrupt-parent = <&mpic>;
179 interrupt-parent = <&mpic>;
190 interrupt-parent = <&mpic>;
201 interrupt-parent = <&mpic>;
221 interrupt-parent = <&mpic>;
225 mpic: interrupt-controller@40000 { label
[all …]
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| D | stx_gp3_8560.dts | 64 interrupt-parent = <&mpic>;
70 interrupt-parent = <&mpic>;
79 interrupt-parent = <&mpic>;
90 interrupt-parent = <&mpic>;
106 interrupt-parent = <&mpic>;
114 interrupt-parent = <&mpic>;
122 interrupt-parent = <&mpic>;
130 interrupt-parent = <&mpic>;
146 interrupt-parent = <&mpic>;
157 interrupt-parent = <&mpic>;
[all …]
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| D | sbc8548-post.dtsi | 29 interrupt-parent = <&mpic>;
35 interrupt-parent = <&mpic>;
44 interrupt-parent = <&mpic>;
55 interrupt-parent = <&mpic>;
66 interrupt-parent = <&mpic>;
82 interrupt-parent = <&mpic>;
90 interrupt-parent = <&mpic>;
98 interrupt-parent = <&mpic>;
106 interrupt-parent = <&mpic>;
122 interrupt-parent = <&mpic>;
[all …]
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| D | storcenter.dts | 66 interrupt-parent = <&mpic>;
82 interrupt-parent = <&mpic>;
93 interrupt-parent = <&mpic>;
96 mpic: interrupt-controller@40000 { label
118 interrupt-parent = <&mpic>;
122 0x6800 0 0 1 &mpic 0 1
123 0x6800 0 0 2 &mpic 0 1
124 0x6800 0 0 3 &mpic 0 1
125 0x6800 0 0 4 &mpic 0 1
127 0x7000 0 0 1 &mpic 0 1
[all …]
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| D | tqm8548-bigflash.dts | 67 interrupt-parent = <&mpic>;
73 interrupt-parent = <&mpic>;
82 interrupt-parent = <&mpic>;
93 interrupt-parent = <&mpic>;
114 interrupt-parent = <&mpic>;
130 interrupt-parent = <&mpic>;
138 interrupt-parent = <&mpic>;
146 interrupt-parent = <&mpic>;
154 interrupt-parent = <&mpic>;
170 interrupt-parent = <&mpic>;
[all …]
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| D | tqm8548.dts | 67 interrupt-parent = <&mpic>;
73 interrupt-parent = <&mpic>;
82 interrupt-parent = <&mpic>;
93 interrupt-parent = <&mpic>;
114 interrupt-parent = <&mpic>;
130 interrupt-parent = <&mpic>;
138 interrupt-parent = <&mpic>;
146 interrupt-parent = <&mpic>;
154 interrupt-parent = <&mpic>;
170 interrupt-parent = <&mpic>;
[all …]
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| D | kuroboxHD.dts | 76 interrupt-parent = <&mpic>;
92 interrupt-parent = <&mpic>;
103 interrupt-parent = <&mpic>;
106 mpic: interrupt-controller@80040000 { label
126 interrupt-parent = <&mpic>;
130 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
131 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
132 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
133 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
135 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
[all …]
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| D | kuroboxHG.dts | 76 interrupt-parent = <&mpic>;
92 interrupt-parent = <&mpic>;
103 interrupt-parent = <&mpic>;
106 mpic: interrupt-controller@80040000 { label
126 interrupt-parent = <&mpic>;
130 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
131 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
132 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
133 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
135 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
[all …]
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| /Linux-v5.10/arch/powerpc/include/asm/ |
| D | mpic.h | 25 /* On the FSL mpic implementations the Mode field is expand to be
122 * Tsi108 implementation of MPIC has many differences from the original one
176 /* weird mpic register indices and mask bits in the HW info array */
255 /* The instance data of a given MPIC */
256 struct mpic struct
258 /* The OpenFirmware dt node for this MPIC */
261 /* The remapper for this MPIC */
287 /* vector numbers used for FSL MPIC error interrupts */
302 /* The physical base address of the MPIC */
332 struct mpic *next; argument
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic.txt | 2 Freescale MPIC Interrupt Controller Node
6 The Freescale MPIC interrupt controller is found on all PowerQUICC
17 Definition: Shall include "fsl,mpic". Freescale MPIC
20 0x10 in the MPIC.
51 MPIC must not be reset by the client program, and that
63 If present the MPIC will be assumed to be big-endian. Some
64 device-trees omit this property on MPIC nodes even when the MPIC is
70 If present the MPIC will be assumed to only be able to route
71 non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
112 MPIC a block of registers referred to as
[all …]
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| D | mpic-msgr.txt | 1 * FSL MPIC Message Registers
4 representation of the message register blocks found in some FSL MPIC
11 "fsl,mpic-v<version>-msgr", where <version> is the version number of
12 the MPIC containing the message registers.
25 - mpic-msgr-receive-mask: Specifies what registers in the containing block
37 'mpic-msgr-block<n>', where <n> is an integer specifying the block's number.
43 mpic-msgr-block0 = &mpic_msgr_block0;
44 mpic-msgr-block1 = &mpic_msgr_block1;
47 mpic_msgr_block0: mpic-msgr-block@41400 {
48 compatible = "fsl,mpic-v3.1-msgr";
[all …]
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