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/Linux-v6.1/Documentation/devicetree/bindings/spi/
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
[all …]
Dbcm47081-buffalo-wzr-900dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-900DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-900DHP (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
30 gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
35 gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
40 gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
44 gpio-keys {
45 compatible = "gpio-keys";
47 button-restart {
50 gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
53 button-wps {
[all …]
Dbcm4708-buffalo-wzr-1750dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1750DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
16 model = "Buffalo WZR-1750DHP (BCM4708)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dbcm47081-buffalo-wzr-600dhp2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-600DHP2
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-600DHP2 (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 gpio-sck = <&chipcommon 7 0>;
32 gpio-mosi = <&chipcommon 4 0>;
[all …]
Dmmp3-dell-ariel.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "dell,wyse-ariel", "marvell,mmp3";
22 #address-cells = <0x1>;
23 #size-cells = <0x1>;
35 compatible = "spi-gpio";
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
Dbcm4708-buffalo-wzr-1166dhp-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1166DHP and WZR-1166DHP2
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
13 #include <dt-bindings/leds/common.h>
17 compatible = "spi-gpio";
18 num-chipselects = <1>;
19 gpio-sck = <&chipcommon 7 0>;
20 gpio-mosi = <&chipcommon 4 0>;
21 cs-gpios = <&chipcommon 6 0>;
22 #address-cells = <1>;
[all …]
Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
27 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
31 pinctrl-0 = <&usart0_pins>;
32 pinctrl-names = "default";
[all …]
Dintel-ixp42x-linksys-wrv54g.dts1 // SPDX-License-Identifier: ISC
9 /dts-v1/;
11 #include "intel-ixp42x.dtsi"
12 #include <dt-bindings/input/input.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
39 compatible = "gpio-leds";
40 led-power {
42 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
[all …]
Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
19 spi2_pins_cfa10056: spi2-cfa10056@0 {
21 fsl,pinmux-ids = <
27 fsl,drive-strength = <MXS_DRIVE_8mA>;
29 fsl,pull-up = <MXS_PULL_ENABLE>;
32 lcdif_pins_cfa10056: lcdif-10056@0 {
[all …]
Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
Darmada-xp-lenovo-ix4-300d.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Lenovo Iomega ix4-300d
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
15 model = "Lenovo Iomega ix4-300d";
16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230",
17 "marvell,armadaxp", "marvell,armada-370-xp";
20 stdout-path = "serial0:115200n8";
[all …]
Dimx28-cfa10055.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * The CFA-10055 is an expansion board for the CFA-10036 module and
9 * CFA-10037, thus we need to include the CFA-10037 DTS.
11 #include "imx28-cfa10037.dts"
14 model = "Crystalfontz CFA-10055 Board";
20 spi2_pins_cfa10055: spi2-cfa10055@0 {
22 fsl,pinmux-ids = <
28 fsl,drive-strength = <MXS_DRIVE_8mA>;
30 fsl,pull-up = <MXS_PULL_ENABLE>;
33 lcdif_18bit_pins_cfa10055: lcdif-18bit@0 {
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
26 mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
[all …]
/Linux-v6.1/drivers/spi/
Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
26 * platform_device->driver_data ... points to spi_gpio
28 * spi->controller_state ... reserved for bitbang framework code
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
37 struct gpio_desc *mosi; member
41 /*----------------------------------------------------------------------*/
48 * - The slow generic way: set up platform_data to hold the GPIO
49 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
52 * - The quicker inlined way: only helps with platform GPIO code
53 * that inlines operations for constant GPIOs. This can give
[all …]
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3566-anbernic-rg503.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include "rk3566-anbernic-rgxx3.dtsi"
21 compatible = "spi-gpio";
22 pinctrl-names = "default";
23 pinctrl-0 = <&spi_pins>;
24 #address-cells = <1>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/panel/
Dsamsung,lms397kf04.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Linus Walleij <linus.walleij@linaro.org>
16 - $ref: panel-common.yaml#
24 reset-gpios: true
26 vci-supply:
30 vccio-supply:
36 spi-cpha: true
38 spi-cpol: true
[all …]
Dsamsung,s6d27a1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 as specified in spi/spi-controller.yaml
14 - Markuss Broks <markuss.broks@gmail.com>
17 - $ref: panel-common.yaml#
32 reset-gpios: true
34 vci-supply:
38 vccio-supply:
44 spi-cpha: true
[all …]
Dsamsung,lms380kf01.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 spi/spi-controller.yaml
16 - Linus Walleij <linus.walleij@linaro.org>
19 - $ref: panel-common.yaml#
34 reset-gpios: true
36 vci-supply:
40 vccio-supply:
46 spi-cpha: true
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7476.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
15 They typically don't provide a MOSI pin, simply reading out data
21 - adi,ad7091
22 - adi,ad7091r
23 - adi,ad7273
24 - adi,ad7274
25 - adi,ad7276
[all …]
/Linux-v6.1/arch/arm64/boot/dts/marvell/
Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
37 cooling-levels = <0 51 102 153 204 255>;
38 #cooling-cells = <2>;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Drzg2l-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
20 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
21 can0-stb-hog {
22 gpio-hog;
23 gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
24 output-low;
[all …]

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