| /Linux-v5.15/drivers/soc/mediatek/ |
| D | mtk-mmsys.c | 11 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include "mtk-mmsys.h"
14 #include "mt8167-mmsys.h"
15 #include "mt8183-mmsys.h"
16 #include "mt8365-mmsys.h"
71 struct mtk_mmsys *mmsys = dev_get_drvdata(dev); in mtk_mmsys_ddp_connect() local
72 const struct mtk_mmsys_routes *routes = mmsys->data->routes; in mtk_mmsys_ddp_connect()
76 for (i = 0; i < mmsys->data->num_routes; i++) in mtk_mmsys_ddp_connect()
78 reg = readl_relaxed(mmsys->regs + routes[i].addr); in mtk_mmsys_ddp_connect()
81 writel_relaxed(reg, mmsys->regs + routes[i].addr); in mtk_mmsys_ddp_connect()
[all …]
|
| D | Kconfig | 69 bool "MediaTek MMSYS Support"
74 Subsystem (MMSYS).
|
| D | Makefile | 8 obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
|
| /Linux-v5.15/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,mmsys.yaml | 4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
7 title: MediaTek mmsys controller
13 The MediaTek mmsys system controller provides clock control, routing control,
14 and miscellaneous control in mmsys partition.
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6797-mmsys
29 - mediatek,mt8167-mmsys
[all …]
|
| /Linux-v5.15/arch/arm/boot/dts/ |
| D | mt7623n.dtsi | 51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
134 <&mmsys CLK_MM_SMI_COMMON>,
145 clocks = <&mmsys CLK_MM_DISP_OVL>;
155 clocks = <&mmsys CLK_MM_DISP_RDMA>;
165 clocks = <&mmsys CLK_MM_DISP_WDMA>;
175 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
[all …]
|
| D | mt2701.dtsi | 194 <&mmsys CLK_MM_SMI_COMMON>,
515 mmsys: syscon@14000000 { label
516 compatible = "mediatek,mt2701-mmsys", "syscon";
525 clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
535 clocks = <&mmsys CLK_MM_SMI_LARB0>,
536 <&mmsys CLK_MM_SMI_LARB0>;
|
| /Linux-v5.15/Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,disp.txt | 5 MMSYS register space. The connections between them can be configured by output
12 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml.
80 mmsys: clock-controller@14000000 {
81 compatible = "mediatek,mt8173-mmsys", "syscon";
92 clocks = <&mmsys CLK_MM_DISP_OVL0>;
102 clocks = <&mmsys CLK_MM_DISP_OVL1>;
112 clocks = <&mmsys CLK_MM_DISP_RDMA0>;
123 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
133 clocks = <&mmsys CLK_MM_DISP_RDMA2>;
143 clocks = <&mmsys CLK_MM_DISP_WDMA0>;
[all …]
|
| D | mediatek,hdmi.yaml | 100 clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
101 <&mmsys CLK_MM_HDMI_PLLCK>,
102 <&mmsys CLK_MM_HDMI_AUDIO>,
103 <&mmsys CLK_MM_HDMI_SPDIF>;
109 mediatek,syscon-hdmi = <&mmsys 0x900>;
|
| D | mediatek,dsi.txt | 45 clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
|
| D | mediatek,dpi.yaml | 79 clocks = <&mmsys CLK_MM_DPI_PIXEL>,
80 <&mmsys CLK_MM_DPI_ENGINE>,
|
| /Linux-v5.15/Documentation/devicetree/bindings/media/ |
| D | mediatek-mdp.txt | 39 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
40 <&mmsys CLK_MM_MUTEX_32K>;
50 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
51 <&mmsys CLK_MM_MUTEX_32K>;
60 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
67 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
74 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
81 clocks = <&mmsys CLK_MM_MDP_WDMA>;
90 clocks = <&mmsys CLK_MM_MDP_WROT0>;
99 clocks = <&mmsys CLK_MM_MDP_WROT1>;
|
| /Linux-v5.15/drivers/clk/mediatek/ |
| D | Kconfig | 23 bool "Clock driver for MediaTek MT2701 mmsys"
26 This driver supports MediaTek MT2701 mmsys clocks.
103 bool "Clock driver for MediaTek MT2712 mmsys"
106 This driver supports MediaTek MT2712 mmsys clocks.
147 bool "Clock driver for MediaTek MT6765 mmsys"
150 This driver supports MediaTek MT6765 mmsys clocks.
215 bool "Clock driver for MediaTek MT6779 mmsys"
218 This driver supports MediaTek MT6779 mmsys clocks.
271 bool "Clock driver for MediaTek MT6797 mmsys"
274 This driver supports MediaTek MT6797 mmsys clocks.
[all …]
|
| D | clk-mt6765-mm.c | 84 { .compatible = "mediatek,mt6765-mmsys", },
|
| /Linux-v5.15/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 992 mmsys: syscon@14000000 { label
993 compatible = "mediatek,mt8173-mmsys", "syscon";
1008 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1009 <&mmsys CLK_MM_MUTEX_32K>;
1019 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
1020 <&mmsys CLK_MM_MUTEX_32K>;
1029 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1036 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1043 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
1050 clocks = <&mmsys CLK_MM_MDP_WDMA>;
[all …]
|
| D | mt8167.dtsi | 129 mmsys: mmsys@14000000 { label
130 compatible = "mediatek,mt8167-mmsys", "syscon";
138 clocks = <&mmsys CLK_MM_SMI_COMMON>,
139 <&mmsys CLK_MM_SMI_COMMON>;
148 clocks = <&mmsys CLK_MM_SMI_LARB0>,
149 <&mmsys CLK_MM_SMI_LARB0>;
|
| D | mt8183.dtsi | 476 <&mmsys CLK_MM_SMI_COMMON>,
477 <&mmsys CLK_MM_SMI_LARB0>,
478 <&mmsys CLK_MM_SMI_LARB1>,
479 <&mmsys CLK_MM_GALS_COMM0>,
480 <&mmsys CLK_MM_GALS_COMM1>,
481 <&mmsys CLK_MM_GALS_CCU2MM>,
482 <&mmsys CLK_MM_GALS_IPU12MM>,
483 <&mmsys CLK_MM_GALS_IMG2MM>,
484 <&mmsys CLK_MM_GALS_CAM2MM>,
485 <&mmsys CLK_MM_GALS_IPU2MM>;
[all …]
|
| D | mt2712e.dtsi | 985 mmsys: syscon@14000000 { label
986 compatible = "mediatek,mt2712-mmsys", "syscon";
997 clocks = <&mmsys CLK_MM_SMI_LARB0>,
998 <&mmsys CLK_MM_SMI_LARB0>;
1006 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1007 <&mmsys CLK_MM_SMI_COMMON>;
1017 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1018 <&mmsys CLK_MM_SMI_LARB4>;
1028 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1029 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
|
| D | mt6779.dtsi | 251 mmsys: syscon@14000000 { label
252 compatible = "mediatek,mt6779-mmsys", "syscon";
|
| D | mt6797.dtsi | 449 mmsys: syscon@14000000 { label
450 compatible = "mediatek,mt6797-mmsys", "syscon";
|
| /Linux-v5.15/Documentation/devicetree/bindings/pwm/ |
| D | pwm-mtk-disp.txt | 15 - "mm": sync signals from the modules of mmsys.
26 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
27 <&mmsys CLK_MM_DISP_PWM0MM>;
|
| /Linux-v5.15/Documentation/devicetree/bindings/mailbox/ |
| D | mtk-gce.txt | 60 mmsys: clock-controller@14000000 {
61 compatible = "mediatek,mt8173-mmsys";
77 clocks = <&mmsys CLK_MM_MUTEX_32K>;
|
| /Linux-v5.15/drivers/gpu/drm/mediatek/ |
| D | mtk_drm_drv.c | 484 { .compatible = "mediatek,mt2701-mmsys",
486 { .compatible = "mediatek,mt7623-mmsys",
488 { .compatible = "mediatek,mt2712-mmsys",
490 { .compatible = "mediatek,mt8167-mmsys",
492 { .compatible = "mediatek,mt8173-mmsys",
494 { .compatible = "mediatek,mt8183-mmsys",
517 dev_err(dev, "Failed to get MMSYS device\n"); in mtk_drm_probe()
|
| D | mtk_drm_ddp_comp.h | 11 #include <linux/soc/mediatek/mtk-mmsys.h>
|
| /Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/ |
| D | mediatek,smi-common.yaml | 137 clocks = <&mmsys CLK_MM_SMI_COMMON>,
138 <&mmsys CLK_MM_SMI_COMMON>;
|
| /Linux-v5.15/include/dt-bindings/clock/ |
| D | mt8167-clk.h | 77 /* MMSYS */
|
