Searched +full:mmc0 +full:- +full:pins (Results 1 – 25 of 284) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
D | fsl,mxs-pinctrl.txt | 3 The pins controlled by mxs pin controller are organized in banks, each bank 4 has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th 5 function is GPIO. The configuration on the pins includes drive strength, 6 voltage and pull-up. 9 - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl" 10 - reg: Should contain the register physical address and length for the 13 Please refer to pinctrl-bindings.txt in this directory for details of the 18 a group of pins, and only affects those parameters that are explicitly listed. 20 information about pull-up. For this reason, even seemingly boolean values are 26 One is to set up a group of pins for a function, both mux selection and pin [all …]
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D | mediatek,mt6779-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Teng <andy.teng@mediatek.com> 15 - compatible: "syscon" 19 const: mediatek,mt6779-pinctrl 25 reg-names: 27 - const: "gpio" 28 - const: "iocfg_rm" [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | at91-sama5d3_ksz9477_evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 5 /dts-v1/; 9 model = "EVB-KSZ9477"; 10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36", 14 stdout-path = &dbgu; 17 reg_3v3: regulator-3v3 { 18 compatible = "regulator-fixed"; 19 regulator-name = "3v3"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; [all …]
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D | owl-s500-roseapplepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com> 8 /dts-v1/; 10 #include "owl-s500.dtsi" 17 mmc0 = &mmc0; 22 stdout-path = "serial2:115200n8"; 30 syspwr: regulator-5v0 { 31 compatible = "regulator-fixed"; 32 regulator-name = "SYSPWR"; 33 regulator-min-microvolt = <5000000>; [all …]
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D | at91-sama5d3_eds.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet 10 /dts-v1/; 15 compatible = "microchip,sama5d3-eds", "atmel,sama5d36", 19 stdout-path = "serial0:115200n8"; 22 gpio-keys { 23 compatible = "gpio-keys"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_key_gpio>; 28 button-3 { [all …]
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D | at91sam9x5ek.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board 11 model = "Atmel AT91SAM9X5-EK"; 16 stdout-path = "serial0:115200n8"; 20 compatible = "atmel,sam9x5-wm8731-audio"; 24 atmel,audio-routing = 30 atmel,ssc-controller = <&ssc0>; 31 atmel,audio-codec = <&wm8731>; 36 atmel,adc-ts-wires = <4>; 37 atmel,adc-ts-pressure-threshold = <10000>; [all …]
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D | at91sam9n12ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board 8 /dts-v1/; 12 model = "Atmel AT91SAM9N12-EK"; 17 stdout-path = "serial0:115200n8"; 26 clock-frequency = <32768>; 30 clock-frequency = <16000000>; 46 compatible = "atmel,tcb-timer"; 51 compatible = "atmel,tcb-timer"; 63 clock-names = "mclk"; [all …]
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D | rk3066a-mk808.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 15 mmc0 = &mmc0; 20 stdout-path = "serial2:115200n8"; 28 adc-keys { 29 compatible = "adc-keys"; 30 io-channels = <&saradc 1>; 31 io-channel-names = "buttons"; 32 keyup-threshold-microvolt = <2500000>; [all …]
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D | at91sam9m10g45ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board 8 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 13 model = "Atmel AT91SAM9M10G45-EK"; 18 stdout-path = "serial0:115200n8"; 27 clock-frequency = <32768>; 31 clock-frequency = <12000000>; 43 compatible = "atmel,tcb-timer"; 48 compatible = "atmel,tcb-timer"; [all …]
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D | suniv-f1c100s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h> 8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&intc>; 16 osc24M: clk-24M { 17 #clock-cells = <0>; 18 compatible = "fixed-clock"; 19 clock-frequency = <24000000>; [all …]
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D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 10 hw-revision = <0>; 14 stdout-path = &ffuart; 22 reg_3v3: regulator-3v3 { 23 compatible = "regulator-fixed"; 24 regulator-name = "3v3-fixed-supply"; 25 regulator-min-microvolt = <3300000>; [all …]
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D | rk3188-radxarock.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 15 mmc0 = &mmc0; 23 gpio-keys { 24 compatible = "gpio-keys"; 27 key-power { 31 linux,input-type = <1>; 32 wakeup-source; 33 debounce-interval = <100>; [all …]
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D | rk3066a-rayeager.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; 15 mmc0 = &mmc0; 25 ir: ir-receiver { 26 compatible = "gpio-ir-receiver"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&ir_int>; 32 keys: gpio-keys { [all …]
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D | exynos4412-odroidx.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel's Exynos4412 based ODROID-X board device tree source 7 * Device tree source file for Hardkernel's ODROID-X board which is based 11 /dts-v1/; 12 #include <dt-bindings/leds/common.h> 13 #include "exynos4412-odroid-common.dtsi" 16 model = "Hardkernel ODROID-X board based on Exynos4412"; 17 compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4"; 29 compatible = "gpio-leds"; 34 default-state = "on"; [all …]
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D | pm9g45.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 7 /dts-v1/; 24 clock-frequency = <32768>; 28 clock-frequency = <12000000>; 40 pinctrl_nand_rb: nand-rb-0 { 41 atmel,pins = 47 pinctrl_board_mmc: mmc0-board { 48 atmel,pins = [all …]
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D | at91-sam9_l9260.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-sam9_l9260.dts - Device Tree file for Olimex SAM9-L9260 board 7 /dts-v1/; 11 model = "Olimex sam9-l9260"; 12 compatible = "olimex,sam9-l9260", "atmel,at91sam9260", "atmel,at91sam9"; 15 stdout-path = "serial0:115200n8"; 24 clock-frequency = <32768>; 28 clock-frequency = <18432000>; 36 compatible = "atmel,tcb-timer"; 41 compatible = "atmel,tcb-timer"; [all …]
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D | at91-sama5d3_xplained.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 14 compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5"; 17 stdout-path = "serial0:115200n8"; 26 clock-frequency = <32768>; 30 clock-frequency = <12000000>; 36 mmc0: mmc@f0000000 { label 37 …pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd… [all …]
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D | at91-cosino.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-cosino.dtsi - Device Tree file for Cosino core module 5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it> 29 clock-frequency = <32768>; 33 clock-frequency = <12000000>; 39 atmel,adc-ts-wires = <4>; 40 atmel,adc-ts-pressure-threshold = <10000>; 49 pinctrl-0 = <&pinctrl_ebi_addr_nand 51 pinctrl-names = "default"; 54 nand-controller { [all …]
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 20 mmc0 = &mmc0; 26 stdout-path = "serial0:115200n8"; 35 pp3300_z5: regulator-pp3300-ldo-z5 { 36 compatible = "regulator-fixed"; 37 regulator-name = "pp3300_ldo_z5"; 38 regulator-always-on; 39 regulator-boot-on; [all …]
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D | mt8195-demo.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 18 compatible = "mediatek,mt8195-demo", "mediatek,mt8195"; 25 stdout-path = "serial0:921600n8"; 30 compatible = "linaro,optee-tz"; 35 gpio-keys { [all …]
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D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 16 mmc0 = &mmc0; 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_pp5000>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; [all …]
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D | mt8183-pumpkin.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 28 stdout-path = "serial0:921600n8"; 31 reserved-memory { 32 #address-cells = <2>; 33 #size-cells = <2>; 37 compatible = "shared-dma-pool"; [all …]
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/Linux-v6.1/Documentation/driver-api/ |
D | pin-control.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up/down, open drain, 17 Top-level interface 22 - A pin controller is a piece of hardware, usually a set of registers, that 23 can control PINs. It may be able to multiplex, bias, set load capacitance, 24 set drive strength, etc. for individual pins or groups of pins. 28 - PINS are equal to pads, fingers, balls or whatever packaging input or 32 be sparse - i.e. there may be gaps in the space with numbers where no [all …]
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/Linux-v6.1/arch/arm64/boot/dts/exynos/ |
D | exynos850-e850-96.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * WinLink E850-96 board device tree source 8 * Device tree source file for WinLink's E850-96 board which is based on 12 /dts-v1/; 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 20 model = "WinLink E850-96 board"; 21 compatible = "winlink,e850-96", "samsung,exynos850"; 24 mmc0 = &mmc_0; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/allwinner/ |
D | sun50i-h616.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/sun50i-h616-ccu.h> 8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h> 9 #include <dt-bindings/clock/sun6i-rtc.h> 10 #include <dt-bindings/reset/sun50i-h616-ccu.h> 11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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