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/Linux-v5.15/drivers/gpu/host1x/
Dmipi.c131 struct tegra_mipi *mipi; member
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
[all …]
/Linux-v5.15/drivers/soundwire/
Dmipi_disco.c5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
38 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
43 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
52 "mipi-sdw-clock-stop-mode0-supported")) in sdw_master_read_prop()
56 "mipi-sdw-clock-stop-mode1-supported")) in sdw_master_read_prop()
60 "mipi-sdw-max-clock-frequency", in sdw_master_read_prop()
63 nval = fwnode_property_count_u32(link, "mipi-sdw-clock-frequencies-supported"); in sdw_master_read_prop()
73 "mipi-sdw-clock-frequencies-supported", in sdw_master_read_prop()
89 nval = fwnode_property_count_u32(link, "mipi-sdw-supported-clock-gears"); in sdw_master_read_prop()
99 "mipi-sdw-supported-clock-gears", in sdw_master_read_prop()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra114-mipi.txt1 NVIDIA Tegra MIPI pad calibration controller
4 - compatible: "nvidia,tegra<chip>-mipi"
9 - mipi-cal
10 - #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
13 User nodes need to contain an nvidia,mipi-calibrate property that has a
19 mipi: mipi@700e3000 {
20 compatible = "nvidia,tegra114-mipi";
23 clock-names = "mipi-cal";
24 #nvidia,mipi-calibrate-cells = <1>;
35 nvidia,mipi-calibrate = <&mipi 0x060>;
/Linux-v5.15/include/video/
Dmipi_display.h3 * Defines for Mobile Industry Processor Interface (MIPI(R))
13 /* MIPI DSI Processor-to-Peripheral transaction types */
66 /* MIPI DSI Peripheral-to-Processor transaction types */
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
131 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
132 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/media/
Dnxp,imx7-mipi-csi2.yaml4 $id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
26 - fsl,imx7-mipi-csi2
27 - fsl,imx8mm-mipi-csi2
40 - description: The MIPI D-PHY clock
55 description: The MIPI D-PHY digital power supply
59 - description: MIPI D-PHY slave reset
99 const: fsl,imx7-mipi-csi2
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Dnxp,imx8mq-mipi-csi2.yaml4 $id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml#
7 title: NXP i.MX8MQ MIPI CSI-2 receiver
20 - fsl,imx8mq-mipi-csi2
50 fsl,mipi-phy-gpr:
53 for setting RX_ENABLE for the mipi receiver.
58 req_gpr is the gpr register offset of RX_ENABLE for the mipi phy.
118 - fsl,mipi-phy-gpr
130 compatible = "fsl,imx8mq-mipi-csi2";
147 fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;
/Linux-v5.15/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
19 - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
20 - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
23 according to DSI host bindings (see MIPI DSI bindings [1])
32 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
[all …]
/Linux-v5.15/Documentation/admin-guide/media/
Dimx7.rst16 - MIPI CSI-2 Receiver
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
36 imx7-mipi-csi2
39 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive the pixel
40 data from MIPI CSI-2 camera sensor. It has one source pad, corresponding to the
48 sensor with a parallel interface or from MIPI CSI-2 virtual channel 0. It has
55 can interface directly with Parallel and MIPI CSI-2 buses. It has 256 x 64 FIFO
76 On this platform an OV2680 MIPI CSI-2 module is connected to the internal MIPI
83 media-ctl -l "'ov2680 1-0036':0 -> 'imx7-mipi-csis.0':0[1]"
84 media-ctl -l "'imx7-mipi-csis.0':1 -> 'csi-mux':1[1]"
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Dimx.rst32 camera sensors over Parallel, BT.656/1120, and MIPI CSI-2 buses.
66 - MIPI CSI-2 Receiver for camera sensors with the MIPI CSI-2 bus
84 - Supports parallel, BT.565, and MIPI CSI-2 interfaces.
115 MIPI CSI-2 OV5640 sensor, requires the i.MX6 MIPI CSI-2 receiver. But
117 therefore does not require the MIPI CSI-2 receiver, so it is missing in
137 imx6-mipi-csi2
140 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive
141 the MIPI CSI-2 stream (usually from a MIPI CSI-2 camera sensor). It has
142 four source pads, corresponding to the four MIPI CSI-2 demuxed virtual
146 This entity actually consists of two sub-blocks. One is the MIPI CSI-2
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/bridge/
Dintel,keembay-dsi.yaml7 title: Devicetree bindings for Intel Keem Bay mipi dsi controller
19 - description: MIPI registers range
23 - const: mipi
27 - description: MIPI DSI clock
28 - description: MIPI DSI econfig clock
29 - description: MIPI DSI config clock
43 description: MIPI DSI input port.
65 mipi-dsi@20900000 {
68 reg-names = "mipi";
Dlontium,lt9611.yaml7 title: Lontium LT9611(UXC) 2 Port MIPI to HDMI Bridge
35 description: Regulator for 1.8V MIPI phy power.
47 Primary MIPI port-1 for MIPI input
52 Additional MIPI port-2 for MIPI input, used in combination
53 with primary MIPI port-1 to drive higher resolution displays
Dtoshiba,tc358762.yaml7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
34 Video port for MIPI DSI input
39 Video port for MIPI DPI output (panel or connector).
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Drockchip-mipi-dphy-rx0.yaml4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
19 const: rockchip,rk3399-mipi-dphy-rx0
23 - description: MIPI D-PHY ref clock
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
65 mipi_dphy_rx0: mipi-dphy-rx0 {
66 compatible = "rockchip,rk3399-mipi-dphy-rx0";
Dmediatek,dsi-phy.yaml8 title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
15 description: The MIPI DSI PHY supports up to 4-lane output.
25 - mediatek,mt7623-mipi-tx
26 - const: mediatek,mt2701-mipi-tx
27 - const: mediatek,mt2701-mipi-tx
28 - const: mediatek,mt8173-mipi-tx
29 - const: mediatek,mt8183-mipi-tx
77 compatible = "mediatek,mt8173-mipi-tx";
Dallwinner,sun6i-a31-mipi-dphy.yaml4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
7 title: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings
19 - const: allwinner,sun6i-a31-mipi-dphy
21 - const: allwinner,sun50i-a64-mipi-dphy
22 - const: allwinner,sun6i-a31-mipi-dphy
53 compatible = "allwinner,sun6i-a31-mipi-dphy";
/Linux-v5.15/Documentation/devicetree/bindings/i3c/
Dmipi-i3c-hci.yaml4 $id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#"
7 title: MIPI I3C HCI Device Tree Bindings
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
27 https://www.mipi.org/specifications/i3c-hci
31 const: mipi-i3c-hci
47 compatible = "mipi-i3c-hci";
/Linux-v5.15/Documentation/devicetree/bindings/display/rockchip/
Ddw_mipi_dsi_rockchip.txt1 Rockchip specific extensions to the Synopsys Designware MIPI DSI
8 "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
9 "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
10 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
27 - power-domains: a phandle to mipi dsi power domain node.
36 mipi_dsi: mipi@ff960000 {
39 compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
/Linux-v5.15/Documentation/driver-api/soundwire/
Dsummary.rst5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
58 The MIPI SoundWire specification uses the term 'device' to refer to a Master
69 Programs all the MIPI-defined Slave registers. Represents a SoundWire
77 Driver controlling the Slave device. MIPI-specified registers are controlled
91 Bus implements API to read standard Master MIPI properties and also provides
133 MIPI specification, so Bus calls the "sdw_master_port_ops" callback
141 The MIPI specification requires each Slave interface to expose a unique
154 board-file, ACPI or DT. The MIPI Software specification defines additional
181 For capabilities, Bus implements API to read standard Slave MIPI properties
198 SoundWire MIPI specification 1.1 is available at:
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/media/i2c/
Dmipi-ccs.yaml5 $id: http://devicetree.org/schemas/media/i2c/mipi-ccs.yaml#
8 title: MIPI CCS, SMIA++ and SMIA compliant camera sensors
16 MIPI Alliance; see
17 <URL:https://www.mipi.org/specifications/camera-command-set>.
30 - const: mipi-ccs-1.1
31 - const: mipi-ccs
33 - const: mipi-ccs-1.0
34 - const: mipi-ccs
115 compatible = "mipi-ccs-1.0", "mipi-ccs";
/Linux-v5.15/drivers/phy/mediatek/
DMakefile15 phy-mtk-mipi-dsi-drv-y := phy-mtk-mipi-dsi.o
16 phy-mtk-mipi-dsi-drv-y += phy-mtk-mipi-dsi-mt8173.o
17 phy-mtk-mipi-dsi-drv-y += phy-mtk-mipi-dsi-mt8183.o
18 obj-$(CONFIG_PHY_MTK_MIPI_DSI) += phy-mtk-mipi-dsi-drv.o
/Linux-v5.15/drivers/staging/media/atomisp/pci/
Dia_css_mipi.h20 * This file contains MIPI support functionality
28 /* @brief Register size of a CSS MIPI frame for check during capturing.
34 * Register size of a CSS MIPI frame to check during capturing. Up to
44 /* @brief Calculate the size of a mipi frame.
48 * @param[in] format The frame (MIPI) format.
49 * @param[in] hasSOLandEOL Whether frame (MIPI) contains (optional) SOL and EOF packets.
51 * @param size_mem_words The mipi frame size in memory words (32B).
54 * Calculate the size of a mipi frame, based on the resolution and format.
/Linux-v5.15/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml7 title: Xilinx MIPI CSI-2 Receiver Subsystem
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
28 - xlnx,mipi-csi2-rx-subsystem-5.0
118 connects to MIPI CSI-2 source like sensor.
174 compatible = "xlnx,mipi-csi2-rx-subsystem-5.0";
196 /* MIPI CSI-2 Camera handle */
/Linux-v5.15/Documentation/devicetree/bindings/soundwire/
Dqcom,sdw.txt59 More info in MIPI Alliance SoundWire 1.0 Specifications.
68 More info in MIPI Alliance SoundWire 1.0 Specifications.
78 More info in MIPI Alliance SoundWire 1.0 Specifications.
86 More info in MIPI Alliance SoundWire 1.0 Specifications.
97 More info in MIPI Alliance SoundWire 1.0 Specifications.
107 More info in MIPI Alliance SoundWire 1.0 Specifications.
117 More info in MIPI Alliance SoundWire 1.0 Specifications.
128 More info in MIPI Alliance SoundWire 1.0 Specifications.
139 More info in MIPI Alliance SoundWire 1.0 Specifications.
151 More info in MIPI Alliance SoundWire 1.0 Specifications.
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/
Dallwinner,sun6i-a31-mipi-dsi.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
7 title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings
16 - allwinner,sun6i-a31-mipi-dsi
17 - allwinner,sun50i-a64-mipi-dsi
71 const: allwinner,sun6i-a31-mipi-dsi
85 const: allwinner,sun50i-a64-mipi-dsi
97 compatible = "allwinner,sun6i-a31-mipi-dsi";
/Linux-v5.15/drivers/phy/rockchip/
DKconfig13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
52 tristate "Rockchip Innosilicon MIPI CSI PHY driver"
57 Enable this to support the Rockchip MIPI CSI PHY with
61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
66 Enable this to support the Rockchip MIPI/LVDS/TTL PHY with

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