| /Linux-v6.6/drivers/net/mdio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
50 tristate "Allwinner sun4i MDIO interface support"
53 This driver supports the MDIO interface found in the network
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| D | mdio-regmap.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Driver for MMIO-Mapped MDIO devices. Some IPs expose internal PHYs or PCS
3 * within the MMIO-mapped area
9 #include <linux/mdio.h>
16 #include <linux/mdio/mdio-regmap.h>
18 #define DRV_NAME "mdio-regmap"
25 static int mdio_regmap_read_c22(struct mii_bus *bus, int addr, int regnum) in mdio_regmap_read_c22() argument
27 struct mdio_regmap_priv *ctx = bus->priv; in mdio_regmap_read_c22()
31 if (ctx->valid_addr != addr) in mdio_regmap_read_c22()
32 return -ENODEV; in mdio_regmap_read_c22()
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| D | mdio-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mdio-mux.h>
13 #define DRV_DESCRIPTION "MDIO bus multiplexer driver"
30 struct mdio_mux_parent_bus *parent; member
36 * The parent bus' lock is used to order access to the switch_fn.
38 static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum) in mdio_mux_read() argument
40 struct mdio_mux_child_bus *cb = bus->priv; in mdio_mux_read()
41 struct mdio_mux_parent_bus *pb = cb->parent; in mdio_mux_read()
44 mutex_lock_nested(&pb->mii_bus->mdio_lock, MDIO_MUTEX_MUX); in mdio_mux_read()
45 r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data); in mdio_mux_read()
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| D | mdio-i2c.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO I2C bridge
5 * Copyright (C) 2015-2016 Russell King
14 #include <linux/mdio/mdio-i2c.h>
19 * I2C bus addresses 0x50 and 0x51 are normally an EEPROM, which is
33 static int i2c_mii_read_default_c45(struct mii_bus *bus, int phy_id, int devad, in i2c_mii_read_default_c45() argument
36 struct i2c_adapter *i2c = bus->priv; in i2c_mii_read_default_c45()
54 msgs[0].len = p - addr; in i2c_mii_read_default_c45()
68 static int i2c_mii_write_default_c45(struct mii_bus *bus, int phy_id, in i2c_mii_write_default_c45() argument
71 struct i2c_adapter *i2c = bus->priv; in i2c_mii_write_default_c45()
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| /Linux-v6.6/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. One or more GPIO
14 lines are used to control which child bus is connected.
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
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| D | mdio-mux-multiplexer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer consumer device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux-multiplexer
25 mux-controls:
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| D | mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common MDIO bus multiplexer/switch properties.
10 - Andrew Lunn <andrew@lunn.ch>
13 An MDIO bus multiplexer/switch will have several child busses that are
14 numbered uniquely in a device dependent manner. The nodes for an MDIO
15 bus multiplexer/switch will have one child node for each child bus.
18 mdio-parent-bus:
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| D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic GXL MDIO bus multiplexer
10 - Jerome Brunet <jbrunet@baylibre.com>
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
14 the internal mdio bus leading to the embedded 10/100 PHY or the external
15 MDIO bus on the Amlogic GXL SoC family.
18 - $ref: mdio-mux.yaml#
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| D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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| D | amlogic,g12a-mdio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
15 - Neil Armstrong <neil.armstrong@linaro.org>
18 - $ref: mdio-mux.yaml#
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| D | fsl-enetc.txt | 9 - reg : Specifies PCIe Device Number and Function
11 to parent node bindings.
12 - compatible : Should be "fsl,enetc".
14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
19 that in turn should contain the "ethernet-phy" node describing the
26 - phy-handle : Phandle to a PHY on the MDIO bus.
29 - phy-connection-type : Defined in ethernet.txt.
31 - mdio : "mdio" node, defined in mdio.txt.
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| D | fsl-tsec-phy.txt | 1 * MDIO IO device
3 The MDIO is a bus to which the PHY devices are connected. For each
4 device that exists on this bus, a child node should be created. See
5 the definition of the PHY node in booting-without-of.txt for an example
9 - reg : Offset and length of the register set for the device, and optionally
14 - compatible : Should define the compatible device type for the
15 mdio. Currently supported strings/devices are:
16 - "fsl,gianfar-tbi"
17 - "fsl,gianfar-mdio"
18 - "fsl,etsec2-tbi"
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| /Linux-v6.6/drivers/net/dsa/mv88e6xxx/ |
| D | pcs-6352.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
25 struct mdio_device mdio; member
43 mutex_lock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_set_fiber_page()
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE); in marvell_c22_pcs_set_fiber_page()
47 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
49 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_set_fiber_page()
58 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
60 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_restore_page()
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| D | pcs-639x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 struct mdio_device mdio; member
35 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
46 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
52 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
59 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
64 mv88e639x_pcs_alloc(struct device *dev, struct mii_bus *bus, unsigned int addr, in mv88e639x_pcs_alloc() argument
73 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
74 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
75 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
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| /Linux-v6.6/drivers/net/ethernet/ti/ |
| D | davinci_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * DaVinci MDIO Module driver
28 #include <linux/mdio-bitbang.h>
32 * This timeout definition is a worst-case ultra defensive measure against
99 struct mii_bus *bus; member
103 * if MDIO bus is registered from DT.
114 mdio_in = clk_get_rate(data->clk); in davinci_mdio_init_clk()
115 div = (mdio_in / data->pdata.bus_freq) - 1; in davinci_mdio_init_clk()
119 data->clk_div = div; in davinci_mdio_init_clk()
121 * One mdio transaction consists of: in davinci_mdio_init_clk()
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| /Linux-v6.6/Documentation/devicetree/bindings/net/dsa/ |
| D | marvell.txt | 2 ---------------------------------------
10 Marvell Switches are MDIO devices. The following properties should be
11 placed as a child node of an mdio device.
17 which is at a different MDIO base address in different switch families.
18 - "marvell,mv88e6085" : Switch has base address 0x10. Use with models:
22 - "marvell,mv88e6190" : Switch has base address 0x00. Use with models:
24 - "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model:
28 - compatible : Should be one of "marvell,mv88e6085",
31 - reg : Address on the MII bus for the switch.
35 - reset-gpios : Should be a gpio specifier for a reset line
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| D | ar9331.txt | 1 Atheros AR9331 built-in switch
4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal
5 MDIO bus. All PHYs are built-in as well.
9 - compatible: should be: "qca,ar9331-switch"
10 - reg: Address on the MII bus for the switch.
11 - resets : Must contain an entry for each entry in reset-names.
12 - reset-names : Must include the following entries: "switch"
13 - interrupt-parent: Phandle to the parent interrupt controller
14 - interrupts: IRQ line for the switch
15 - interrupt-controller: Indicates the switch is itself an interrupt
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| /Linux-v6.6/drivers/net/ethernet/hisilicon/ |
| D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
24 #define MDIO_BUS_NAME "Hisilicon MII Bus"
38 u8 __iomem *vbase; /* mdio reg base address */
43 /* mdio reg */
101 mdio_write_reg((a)->vbase, (reg), (value))
126 mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
137 mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))
140 mdio_get_reg_field((dev)->vbase, (reg), 0x1ull, (bit))
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| /Linux-v6.6/Documentation/devicetree/bindings/mux/ |
| D | reg-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
13 Define register bitfields to be used to control multiplexers. The parent
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
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| /Linux-v6.6/arch/arm/boot/dts/nxp/vf/ |
| D | vf610-zii-dev-rev-c.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
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| /Linux-v6.6/arch/powerpc/boot/dts/ |
| D | kmeter1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * 2008-2011 DENX Software Engineering GmbH
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>; // 32 bytes
35 i-cache-line-size = <32>; // 32 bytes
36 d-cache-size = <32768>; // L1, 32K
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| /Linux-v6.6/drivers/net/ethernet/freescale/ |
| D | xgmac_mdio.c | 2 * QorIQ 10G MDIO Controller
20 #include <linux/mdio.h>
33 __be32 mdio_stat; /* MDIO configuration and status */
34 __be32 mdio_ctl; /* MDIO control */
35 __be32 mdio_data; /* MDIO data */
36 __be32 mdio_addr; /* MDIO address */
82 * Wait until the MDIO bus is free
90 /* Wait till the bus is free */ in xgmac_wait_until_free()
92 while ((xgmac_read32(®s->mdio_stat, is_little_endian) & in xgmac_wait_until_free()
95 timeout--; in xgmac_wait_until_free()
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| /Linux-v6.6/drivers/net/ethernet/marvell/ |
| D | mvmdio.c | 2 * Driver for the MDIO interface of Marvell network interfaces.
4 * Since the MDIO interface of Marvell network interfaces is shared
8 * the MDIO bus). This driver is currently used by the mvneta and
13 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
57 * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
58 * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
94 struct mii_bus *bus) in orion_mdio_wait_ready() argument
96 struct orion_mdio_dev *dev = bus->priv; in orion_mdio_wait_ready()
102 if (ops->is_done(dev)) in orion_mdio_wait_ready()
107 if (dev->err_interrupt <= 0) { in orion_mdio_wait_ready()
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| /Linux-v6.6/drivers/net/phy/ |
| D | mdio_bus.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* MDIO Bus interface
40 #include <trace/events/mdio.h>
42 #include "mdio-boardinfo.h"
47 mdiodev->reset_gpio = gpiod_get_optional(&mdiodev->dev, in mdiobus_register_gpiod()
49 if (IS_ERR(mdiodev->reset_gpio)) in mdiobus_register_gpiod()
50 return PTR_ERR(mdiodev->reset_gpio); in mdiobus_register_gpiod()
52 if (mdiodev->reset_gpio) in mdiobus_register_gpiod()
53 gpiod_set_consumer_name(mdiodev->reset_gpio, "PHY reset"); in mdiobus_register_gpiod()
62 reset = reset_control_get_optional_exclusive(&mdiodev->dev, "phy"); in mdiobus_register_reset()
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