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/Linux-v5.15/tools/testing/selftests/drivers/net/mlxsw/
Dethtool_lanes.sh2 # SPDX-License-Identifier: GPL-2.0
21 ip link set dev $swp1 up
22 ip link set dev $swp2 up
28 if [[ -z $lanes_exist ]]; then
33 ip link set dev $swp2 down
34 ip link set dev $swp1 down
61 if [[ $autoneg -eq 0 ]]; then
65 ethtool -s $swp1 speed $max_speed lanes $unsupported_lanes $autoneg_str &> /dev/null
75 local -a lanes_arr
76 local -a speeds_arr
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dti,j721e-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: "cdns-pcie-ep.yaml#"
19 - const: ti,j721e-pcie-ep
20 - description: PCIe EP controller in AM64
22 - const: ti,am64-pcie-ep
[all …]
Dti,j721e-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: "cdns-pcie-host.yaml#"
19 - const: ti,j721e-pcie-host
20 - description: PCIe controller in AM64
22 - const: ti,am64-pcie-host
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Dti,am65-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: pci-ep.yaml#
19 - ti,am654-pcie-ep
24 reg-names:
26 - const: app
[all …]
Dti,am65-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: /schemas/pci/pci-bus.yaml#
19 - ti,am654-pcie-rc
20 - ti,keystone-pcie
25 reg-names:
[all …]
Dintel-gw-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
16 const: intel,lgm-pcie
18 - compatible
21 - $ref: /schemas/pci/snps,dw-pcie.yaml#
26 - const: intel,lgm-pcie
27 - const: snps,dw-pcie
[all …]
/Linux-v5.15/drivers/infiniband/hw/hfi1/
Dmad.h1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
3 * Copyright(c) 2015 - 2017 Intel Corporation.
38 #define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable
41 #define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
42 #define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */
147 * The default link width is multiplied by 1000
282 __be16 ccti_limit; /* max CCTI for cc table */
287 u16 ccti_limit; /* max CCTI for cc table */
295 u16 ccti_limit; /* max CCTI for cc table */
300 * struct cc_state combines the (active) per-port congestion control
[all …]
Dpcie.c1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2019 Intel Corporation.
27 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
43 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
49 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
53 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
60 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
91 * fields required to re-initialize after a chip reset, or for
112 return -EINVAL; in hfi1_pcie_ddinit()
115 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
[all …]
/Linux-v5.15/drivers/net/pcs/
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
14 #include "pcs-xpcs.h"
139 const struct xpcs_compat *compat = &id->compat[i]; in xpcs_find_compat()
141 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
142 if (compat->interface[j] == interface) in xpcs_find_compat()
153 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_get_an_mode()
155 return -ENODEV; in xpcs_get_an_mode()
157 return compat->an_mode; in xpcs_get_an_mode()
166 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/e1000/
De1000_param.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
12 #define OPTION_UNSET -1
30 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
31 * Valid Range: 80-4096 for 82544 and newer
39 * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
40 * Valid Range: 80-4096 for 82544 and newer
46 /* User Specified Speed Override
49 * - 0 - auto-negotiate at all supported speeds
50 * - 10 - only link at 10 Mbps
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/Linux-v5.15/include/uapi/linux/
Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
18 * The HyperTransport I/O Link Specification
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#/definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dapq8096-db820c.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
20 * LSEC = Low Speed External Connector
21 * P HSEC = Primary High Speed External Connector
22 * S HSEC = Secondary High Speed External Connector
[all …]
Dapq8016-sbc.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "msm8916-pm8916.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
26 stdout-path = "serial0";
29 camera_vdddo_1v8: camera-vdddo-1v8 {
30 compatible = "regulator-fixed";
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
[all …]
Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
Dimx51-zii-scu3-esb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 compatible = "zii,imx51-scu3-esb", "fsl,imx51";
16 stdout-path = &uart1;
25 usb_vbus: regulator-usb-vbus {
26 compatible = "regulator-fixed";
27 regulator-name = "usb_vbus";
28 regulator-min-microvolt = <5000000>;
29 regulator-max-microvolt = <5000000>;
31 pinctrl-names = "default";
[all …]
Dimx7d-zii-rpu2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * RPU - Remote Peripheral Unit
10 /dts-v1/;
11 #include <dt-bindings/thermal/thermal.h>
16 compatible = "zii,imx7d-rpu2", "fsl,imx7d";
19 stdout-path = &uart2;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <24576000>;
28 cs2000_in_dummy: dummy-oscillator {
[all …]
/Linux-v5.15/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_param.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define OPTION_UNSET -1
17 * TxDescriptors - Transmit Descriptor Count
18 * @Valid Range: PCH_GBE_MIN_TXD - PCH_GBE_MAX_TXD
26 * RxDescriptors -Receive Descriptor Count
27 * @Valid Range: PCH_GBE_MIN_RXD - PCH_GBE_MAX_RXD
35 * Speed - User Specified Speed Override
37 * - 0: auto-negotiate at all supported speeds
38 * - 10: only link at 10 Mbps
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: dsa.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
[all …]
/Linux-v5.15/drivers/net/ethernet/broadcom/genet/
Dbcmmii.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2014-2017 Broadcom
24 #include <linux/platform_data/mdio-bcm-unimac.h>
28 /* setup netdev link state when PHY link status change and
29 * update UMAC and RGMII block when link up
34 struct phy_device *phydev = dev->phydev; in bcmgenet_mii_setup()
38 if (priv->old_link != phydev->link) { in bcmgenet_mii_setup()
40 priv->old_link = phydev->link; in bcmgenet_mii_setup()
43 if (phydev->link) { in bcmgenet_mii_setup()
44 /* check speed/duplex/pause changes */ in bcmgenet_mii_setup()
[all …]
/Linux-v5.15/drivers/staging/fwserial/
Dfwserial.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/firewire-constants.h>
55 * @guid: unique 64-bit guid for this unit device
58 * @speed: link speed of peer (0 = S100, 2 = S400, ... 5 = S3200)
62 * @fifo_len: max length for single write to fifo_addr
63 * @list: link for insertion into fw_serial's peer_list
72 * @connect: work item for auto-connecting
82 unsigned int speed; member
118 FWPS_NO_MGMT_ADDR = -1,
127 peer->state = new; in peer_set_state()
[all …]
/Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dpcie.c33 nvkm_pcie_speed(enum pci_bus_speed speed) in nvkm_pcie_speed() argument
35 switch (speed) { in nvkm_pcie_speed()
44 if (speed == 0x17) in nvkm_pcie_speed()
46 return -1; in nvkm_pcie_speed()
53 if (!pci->func->pcie.version) in nvkm_pcie_get_version()
54 return -ENOSYS; in nvkm_pcie_get_version()
56 return pci->func->pcie.version(pci); in nvkm_pcie_get_version()
62 if (!pci->func->pcie.version_supported) in nvkm_pcie_get_max_version()
63 return -ENOSYS; in nvkm_pcie_get_max_version()
65 return pci->func->pcie.version_supported(pci); in nvkm_pcie_get_max_version()
[all …]
/Linux-v5.15/drivers/pci/
Dof.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI <-> OF mapping helpers
21 if (!dev->bus->dev.of_node) in pci_set_of_node()
23 dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node, in pci_set_of_node()
24 dev->devfn); in pci_set_of_node()
25 if (dev->dev.of_node) in pci_set_of_node()
26 dev->dev.fwnode = &dev->dev.of_node->fwnode; in pci_set_of_node()
31 of_node_put(dev->dev.of_node); in pci_release_of_node()
32 dev->dev.of_node = NULL; in pci_release_of_node()
33 dev->dev.fwnode = NULL; in pci_release_of_node()
[all …]
/Linux-v5.15/drivers/usb/host/
Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/io-64-nonatomic-lo-hi.h>
21 /* Code sharing between pci-quirks and xhci hcd */
22 #include "xhci-ext-caps.h"
23 #include "pci-quirks.h"
25 /* max buffer size for trace and debug messages */
31 /* Max number of USB devices for any host controller - limit in section 6.1 */
33 /* Section 5.3.3 - MaxPorts */
43 * struct xhci_cap_regs - xHCI Host Controller Capability Registers.
45 * @hcs_params1: HCSPARAMS1 - Structural Parameters 1
[all …]

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