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/Linux-v6.1/drivers/clk/mmp/
Dclk-frac.c35 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_round_rate()
54 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
61 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
64 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
71 do_div(rate, num * factor->masks->factor); in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
90 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_set_rate()
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
104 val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift; in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
[all …]
/Linux-v6.1/drivers/clk/spear/
Dclk-aux-synth.c77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
78 if (eqn == aux->masks->eq1_mask) in clk_aux_recalc_rate()
82 num = (val >> aux->masks->xscale_sel_shift) & in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
86 den *= (val >> aux->masks->yscale_sel_shift) & in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
112 val |= (rtbl[i].eq & aux->masks->eq_sel_mask) << in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
[all …]
/Linux-v6.1/sound/soc/codecs/
Dtscs42xx.h124 /* Field Masks */
132 /* Register Masks */
147 /* Field Masks */
155 /* Register Masks */
170 /* Field Masks */
178 /* Register Masks */
195 /* Field Masks */
203 /* Register Masks */
220 /* Field Masks */
228 /* Register Masks */
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Dcs42l56.h60 /* Device ID and Rev ID Masks */
66 /* Power bit masks */
78 /* serial port and clk masks */
96 /* Class H and misc ctl masks */
112 /* Playback Capture ctl masks */
130 /* Beep masks */
/Linux-v6.1/kernel/irq/
Daffinity.c45 cpumask_var_t *masks; in alloc_node_to_cpumask() local
48 masks = kcalloc(nr_node_ids, sizeof(cpumask_var_t), GFP_KERNEL); in alloc_node_to_cpumask()
49 if (!masks) in alloc_node_to_cpumask()
53 if (!zalloc_cpumask_var(&masks[node], GFP_KERNEL)) in alloc_node_to_cpumask()
57 return masks; in alloc_node_to_cpumask()
61 free_cpumask_var(masks[node]); in alloc_node_to_cpumask()
62 kfree(masks); in alloc_node_to_cpumask()
66 static void free_node_to_cpumask(cpumask_var_t *masks) in free_node_to_cpumask() argument
71 free_cpumask_var(masks[node]); in free_node_to_cpumask()
72 kfree(masks); in free_node_to_cpumask()
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/Linux-v6.1/drivers/net/dsa/microchip/
Dksz8795.c114 const u32 *masks; in ksz8_r_mib_cnt() local
121 masks = dev->info->masks; in ksz8_r_mib_cnt()
136 if (check & masks[MIB_COUNTER_VALID]) { in ksz8_r_mib_cnt()
138 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8_r_mib_cnt()
150 const u32 *masks; in ksz8795_r_mib_pkt() local
157 masks = dev->info->masks; in ksz8795_r_mib_pkt()
174 if (check & masks[MIB_COUNTER_VALID]) { in ksz8795_r_mib_pkt()
183 if (check & masks[MIB_COUNTER_OVERFLOW]) { in ksz8795_r_mib_pkt()
189 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8795_r_mib_pkt()
321 const u32 *masks; in ksz8_valid_dyn_entry() local
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/Linux-v6.1/drivers/net/ethernet/ezchip/
Dnps_enet.h35 /* Tx control register masks and shifts */
43 /* Rx control register masks and shifts */
53 /* Interrupt enable for data buffer events register masks and shifts */
59 /* Gbps Eth MAC Configuration 0 register masks and shifts */
93 /* Gbps Eth MAC Configuration 1 register masks and shifts */
103 /* Gbps Eth MAC Configuration 2 register masks and shifts */
119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
141 /* GE MAC, PCS reset control register masks and shifts */
147 /* Tx phase sync FIFO control register masks and shifts */
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp_cm.c119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
214 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
216 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
261 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dpp1_cm_get_reg_field()
263 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
265 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dpp1_cm_get_reg_field()
267 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
270 reg->masks.field_region_end = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
272 reg->masks.field_region_end_slope = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B; in dpp1_cm_get_reg_field()
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb_cm.c53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
64 reg->masks.exp_region1_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
73 reg->masks.field_region_linear_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_SLOPE_B; in dwb3_get_reg_field_ogam()
[all …]
Ddcn30_dpp_cm.c177 reg->masks.field_region_start_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_BASE_B; in dpp3_gamcor_reg_field()
179 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
182 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
184 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
186 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
188 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
191 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
193 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
195 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
197 reg->masks.field_region_linear_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_SLOPE_B; in dpp3_gamcor_reg_field()
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/Linux-v6.1/arch/riscv/mm/
Dpageattr.c19 struct pageattr_masks *masks = walk->private; in set_pageattr_masks() local
22 new_val &= ~(pgprot_val(masks->clear_mask)); in set_pageattr_masks()
23 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
113 struct pageattr_masks masks = { in __set_memory() local
123 &masks); in __set_memory()
164 struct pageattr_masks masks = { in set_direct_map_invalid_noflush() local
170 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_invalid_noflush()
181 struct pageattr_masks masks = { in set_direct_map_default_noflush() local
187 ret = walk_page_range(&init_mm, start, end, &pageattr_ops, &masks); in set_direct_map_default_noflush()
/Linux-v6.1/arch/arm/mach-s3c/
Dwakeup-mask.h27 * @masks: The list of masks to use.
28 * @nr_masks: The number of entries pointed to buy @masks.
31 * of interrupts and control bits in @masks. We do this at suspend time
36 const struct samsung_wakeup_mask *masks,
/Linux-v6.1/drivers/net/ethernet/intel/ixgb/
Dixgb_hw.h221 /* CTRL0 Bit Masks */
240 /* CTRL1 Bit Masks */
261 /* STATUS Bit Masks */
281 /* EECD Bit Masks */
293 /* Interrupt Register Bit Masks (used for ICR, ICS, IMS, and IMC) */
307 /* RCTL Bit Masks */
340 /* FCRTL Bit Masks */
343 /* RXDCTL Bit Masks */
351 /* RAIDC Bit Masks */
365 /* RXCSUM Bit Masks */
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/Linux-v6.1/drivers/media/pci/dt3155/
Ddt3155.h69 /* CSR1 bit masks */
88 /* INT_CSR bit masks */
96 /* IIC_CSR1 bit masks */
99 /* IIC_CSR2 bit masks */
105 /* CSR2 bit masks */
115 /* CSR_EVEN/ODD bit masks */
120 /* CONFIG bit masks */
131 /* AD_CMD bit masks */
/Linux-v6.1/drivers/media/i2c/
Dadv7343_regs.h84 /* Bit masks for Mode Select Register */
90 /* Bit masks for Mode Register 0 */
95 /* Bit masks for DAC output levels */
98 /* Bit masks for soft reset register */
101 /* Bit masks for HD Mode Register 1 */
123 /* Bit masks for SD Mode Register 1 */
134 /* Bit masks for SD Mode Register 2 */
147 /* Bit masks for HD Mode Register 6 */
Dadv7393_regs.h92 /* Bit masks for Mode Select Register */
98 /* Bit masks for Mode Register 0 */
103 /* Bit masks for SD brightness/WSS */
107 /* Bit masks for soft reset register */
110 /* Bit masks for HD Mode Register 1 */
132 /* Bit masks for SD Mode Register 1 */
143 /* Bit masks for SD Mode Register 2 */
156 /* Bit masks for HD Mode Register 6 */
/Linux-v6.1/drivers/usb/misc/
Dbrcmstb-usb-pinmap.c154 res = of_property_read_u32_index(dn, "brcm,in-masks", index++, in parse_pins()
157 dev_err(dev, "Error getting 1st brcm,in-masks for %s\n", in parse_pins()
161 res = of_property_read_u32_index(dn, "brcm,in-masks", index++, in parse_pins()
164 dev_err(dev, "Error getting 2nd brcm,in-masks for %s\n", in parse_pins()
186 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
189 dev_err(dev, "Error getting 1st brcm,out-masks for %s\n", in parse_pins()
193 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
196 dev_err(dev, "Error getting 2nd brcm,out-masks for %s\n", in parse_pins()
200 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
203 dev_err(dev, "Error getting 3rd brcm,out-masks for %s\n", in parse_pins()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_i2c_hw.c41 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
80 else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK) in get_channel_status()
82 else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT) in get_channel_status()
84 else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED) in get_channel_status()
86 else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE) in get_channel_status()
287 if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL) in set_speed()
624 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
631 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
647 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
654 masks); in dce100_i2c_hw_construct()
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/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dbrcm,usb-pinmap.yaml33 brcm,in-masks:
45 brcm,out-masks:
47 description: Array of enable, value, changed and clear masks, one
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
/Linux-v6.1/drivers/clk/uniphier/
Dclk-uniphier-mux.c17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
/Linux-v6.1/drivers/usb/gadget/udc/
Dfsl_usb2_udc.h115 /* Frame Index Register Bit Masks */
117 /* USB CMD Register Bit Masks */
157 /* USB STS Register Bit Masks */
172 /* USB INTR Register Bit Masks */
183 /* Device Address bit masks */
187 /* endpoint list address bit masks */
190 /* PORTSCX Register Bit Masks */
254 /* otgsc Register Bit Masks */
281 /* USB MODE Register Bit Masks */
294 /* Endpoint Setup Status bit masks */
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/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dtdm-slot.txt20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c165 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_output_csc()
167 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_output_csc()
223 ocsc_regs.masks.csc_c11 = mpc20->mpc_mask->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
225 ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
251 reg->masks.exp_region0_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
253 reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
255 reg->masks.exp_region1_lut_offset = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
257 reg->masks.exp_region1_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
259 reg->masks.field_region_end = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
261 reg->masks.field_region_end_slope = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
[all …]
/Linux-v6.1/sound/ppc/
Dawacs.h29 /* Audio Bit Masks */
32 /* Audio Control Reg Bit Masks */
43 /* Audio Codec Control Reg Bit Masks */
50 /* Audio Codec Control Address Values / Masks */
73 /* Address 0 Bit Masks & Macros */
91 /* Address 1 Bit Masks */
121 /* Address 2 & 4 Bit Masks & Macros */
137 /* Audio Codec Status Reg Bit Masks */
157 /* Clipping Count Reg Bit Masks */
162 /* DBDMA ChannelStatus Bit Masks */
/Linux-v6.1/drivers/net/ethernet/xilinx/
Dxilinx_axienet.h179 /* Bit Masks for Axi Ethernet RAF register */
198 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
203 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
223 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
227 /* Bit masks for Axi Ethernet VLAN TPID Word 1 register */
231 /* Bit masks for Axi Ethernet RCW1 register */
247 /* Bit masks for Axi Ethernet TC register */
257 /* Bit masks for Axi Ethernet FCC register */
261 /* Bit masks for Axi Ethernet EMMC register */
273 /* Bit masks for Axi Ethernet PHYC register */
[all …]

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