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/Linux-v5.10/drivers/mailbox/
DKconfig2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
9 if MAILBOX
12 tristate "ARM MHU Mailbox"
16 The controller has 3 mailbox channels, the last of which can be
20 tristate "i.MX Mailbox"
23 Mailbox implementation for i.MX Messaging Unit (MU).
26 tristate "Platform MHU Mailbox"
32 The controller has a maximum of 3 mailbox channels, the last of
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DMakefile2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
10 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
12 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
18 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
20 obj-$(CONFIG_ROCKCHIP_MBOX) += rockchip-mailbox.o
24 obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
26 obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
28 obj-$(CONFIG_STI_MBOX) += mailbox-sti.o
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/Linux-v5.10/Documentation/devicetree/bindings/mailbox/
Domap-mailbox.txt1 OMAP2+ and K3 Mailbox
4 The OMAP mailbox hardware facilitates communication between different processors
5 using a queued mailbox interrupt mechanism. The IP block is external to the
10 Each mailbox IP block/cluster has a certain number of h/w fifo queues and output
32 Mailbox Device Node:
34 A Mailbox device node is used to represent a Mailbox IP instance/cluster within
40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
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Dmailbox.txt1 * Generic Mailbox Controller and client driver bindings
3 Generic binding to provide a way for Mailbox controller drivers to
4 assign appropriate mailbox channel to client drivers.
6 * Mailbox Controller
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
19 * Mailbox Client
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
27 users of these mailboxes for IPC, one for each mailbox. This shared
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Dhisilicon,hi6220-mailbox.txt1 Hisilicon Hi6220 Mailbox Driver
4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
9 Mailbox Device Node:
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
20 of cells required for the mailbox specifier. Must be 3.
22 phandle: Label name of mailbox controller
27 mailbox driver uses it to acknowledge interrupt
28 - interrupts: Contains the interrupt information for the mailbox
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
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Daltera-mailbox.txt1 Altera Mailbox Driver
5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
16 mbox_tx: mailbox@100 {
17 compatible = "altr,mailbox-1.0";
24 mbox_rx: mailbox@200 {
25 compatible = "altr,mailbox-1.0";
32 Mailbox client
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Dxgene-slimpro-mailbox.txt1 The APM X-Gene SLIMpro mailbox is used to communicate messages between
6 There are total of 8 interrupts in this mailbox. Each used for an individual
7 door bell (or mailbox channel).
12 - reg: Contains the mailbox register address range.
15 the interrupt for mailbox channel 0 and interrupt 1 for
16 mailbox channel 1 and so likewise for the reminder.
18 - #mbox-cells: only one to specify the mailbox channel number.
22 Mailbox Node:
23 mailbox: mailbox@10540000 {
Dsti-mailbox.txt1 ST Microelectronics Mailbox Driver
3 Each ST Mailbox IP currently consists of 4 instances of 32 channels. Messages
10 - compatible : Should be "st,stih407-mailbox"
12 - mbox-name : Name of the mailbox
20 - interrupts : Contains the IRQ line for a Rx mailbox
24 mailbox0: mailbox@0 {
25 compatible = "st,stih407-mailbox";
38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
47 compatible = "mailbox-test";
Dxlnx,zynqmp-ipi-mailbox.txt1 Xilinx IPI Mailbox Controller
4 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
35 - compatible: Shall be: "xlnx,zynqmp-ipi-mailbox"
40 - #address-cells: number of address cells of internal IPI mailbox nodes
41 - #size-cells: number of size cells of internal IPI mailbox nodes
43 Internal IPI mailbox node:
60 - xlnx,ipi-id: remote Xilinx IPI agent ID of which the mailbox is
73 - mboxes: Standard property to specify a mailbox
74 (See ./mailbox.txt)
75 - mbox-names: List of identifier strings for each mailbox
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/Linux-v5.10/drivers/net/ethernet/mellanox/mlx4/
Dfw_qos.c87 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_PRIO2TC() local
93 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_PRIO2TC()
94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
103 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, in mlx4_SET_PORT_PRIO2TC()
106 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_SET_PORT_PRIO2TC()
114 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_SCHEDULER() local
120 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_SCHEDULER()
121 if (IS_ERR(mailbox)) in mlx4_SET_PORT_SCHEDULER()
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Dmcg.c54 struct mlx4_cmd_mailbox *mailbox, in mlx4_QP_FLOW_STEERING_ATTACH() argument
61 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, size, 0, in mlx4_QP_FLOW_STEERING_ATTACH()
83 struct mlx4_cmd_mailbox *mailbox) in mlx4_READ_ENTRY() argument
85 return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, in mlx4_READ_ENTRY()
90 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_ENTRY() argument
92 return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, in mlx4_WRITE_ENTRY()
97 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_PROMISC() argument
102 return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, in mlx4_WRITE_PROMISC()
107 static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_GID_HASH() argument
113 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, in mlx4_GID_HASH()
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Dsrq.c64 static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_SRQ() argument
67 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, in mlx4_SW2HW_SRQ()
72 static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_SRQ() argument
75 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, in mlx4_HW2SW_SRQ()
76 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ, in mlx4_HW2SW_SRQ()
86 static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_QUERY_SRQ() argument
89 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ, in mlx4_QUERY_SRQ()
166 struct mlx4_cmd_mailbox *mailbox; in mlx4_srq_alloc() local
181 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_srq_alloc()
182 if (IS_ERR(mailbox)) { in mlx4_srq_alloc()
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Dfw.c180 struct mlx4_cmd_mailbox *mailbox; in mlx4_MOD_STAT_CFG() local
189 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_MOD_STAT_CFG()
190 if (IS_ERR(mailbox)) in mlx4_MOD_STAT_CFG()
191 return PTR_ERR(mailbox); in mlx4_MOD_STAT_CFG()
192 inbox = mailbox->buf; in mlx4_MOD_STAT_CFG()
197 err = mlx4_cmd(dev, mailbox->dma, 0, 0, MLX4_CMD_MOD_STAT_CFG, in mlx4_MOD_STAT_CFG()
200 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_MOD_STAT_CFG()
206 struct mlx4_cmd_mailbox *mailbox; in mlx4_QUERY_FUNC() local
221 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_QUERY_FUNC()
222 if (IS_ERR(mailbox)) in mlx4_QUERY_FUNC()
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Dcq.c146 static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_CQ() argument
149 return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, in mlx4_SW2HW_CQ()
154 static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_MODIFY_CQ() argument
157 return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ, in mlx4_MODIFY_CQ()
161 static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_CQ() argument
164 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, in mlx4_HW2SW_CQ()
165 cq_num, mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ, in mlx4_HW2SW_CQ()
172 struct mlx4_cmd_mailbox *mailbox; in mlx4_cq_modify() local
176 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_cq_modify()
177 if (IS_ERR(mailbox)) in mlx4_cq_modify()
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/Linux-v5.10/arch/arm64/kernel/
Dacpi_parking_protocol.c21 struct parking_protocol_mailbox __iomem *mailbox; member
62 struct parking_protocol_mailbox __iomem *mailbox; in acpi_parking_protocol_cpu_boot() local
66 * Map mailbox memory with attribute device nGnRE (ie ioremap - in acpi_parking_protocol_cpu_boot()
71 * If the mailbox is mistakenly allocated in the linear mapping in acpi_parking_protocol_cpu_boot()
76 mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox)); in acpi_parking_protocol_cpu_boot()
77 if (!mailbox) in acpi_parking_protocol_cpu_boot()
80 cpu_id = readl_relaxed(&mailbox->cpu_id); in acpi_parking_protocol_cpu_boot()
82 * Check if firmware has set-up the mailbox entry properly in acpi_parking_protocol_cpu_boot()
86 iounmap(mailbox); in acpi_parking_protocol_cpu_boot()
91 * stash the mailbox address mapping to use it for further FW in acpi_parking_protocol_cpu_boot()
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/Linux-v5.10/drivers/scsi/lpfc/
Dlpfc_mbox.c49 * @pmb: pointer to the driver internal queue element for mailbox command.
52 * The dump mailbox command provides a method for the device driver to obtain
55 * This routine prepares the mailbox command for dumping list of static
75 /* For SLI3 HBAs data is embedded in mailbox */ in lpfc_dump_static_vport()
108 * @pmb: pointer to the driver internal queue element for mailbox command.
110 * This routine prepares a mailbox command to bring down HBA link.
123 * lpfc_dump_mem - Prepare a mailbox command for reading a region.
125 * @pmb: pointer to the driver internal queue element for mailbox command.
129 * The dump mailbox command provides a method for the device driver to obtain
132 * This routine prepares the mailbox command for dumping HBA's config region.
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/Linux-v5.10/drivers/infiniband/hw/mthca/
Dmthca_cmd.c468 /* Invoke a command with an output mailbox */
612 struct mthca_mailbox *mailbox; in mthca_alloc_mailbox() local
614 mailbox = kmalloc(sizeof *mailbox, gfp_mask); in mthca_alloc_mailbox()
615 if (!mailbox) in mthca_alloc_mailbox()
618 mailbox->buf = dma_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma); in mthca_alloc_mailbox()
619 if (!mailbox->buf) { in mthca_alloc_mailbox()
620 kfree(mailbox); in mthca_alloc_mailbox()
624 return mailbox; in mthca_alloc_mailbox()
627 void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox) in mthca_free_mailbox() argument
629 if (!mailbox) in mthca_free_mailbox()
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Dmthca_mcg.c67 struct mthca_mailbox *mailbox; in find_mgm() local
72 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in find_mgm()
73 if (IS_ERR(mailbox)) in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
79 err = mthca_MGID_HASH(dev, mailbox, hash); in find_mgm()
116 mthca_free_mailbox(dev, mailbox); in find_mgm()
123 struct mthca_mailbox *mailbox; in mthca_multicast_attach() local
131 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_multicast_attach()
132 if (IS_ERR(mailbox)) in mthca_multicast_attach()
133 return PTR_ERR(mailbox); in mthca_multicast_attach()
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/Linux-v5.10/drivers/net/ethernet/intel/fm10k/
Dfm10k_mbx.c125 * @mbx: pointer to mailbox
145 * @mbx: pointer to mailbox
161 * @mbx: pointer to mailbox
177 * @mbx: pointer to mailbox
193 * @mbx: pointer to mailbox
209 * @mbx: pointer to mailbox
290 * @mbx: pointer to mailbox
294 * the start of a message larger than the mailbox is detected.
324 * @mbx: pointer to mailbox
327 * mailbox memory. The offset in mbmem is based on the lower bits of the
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Dfm10k_mbx.h13 /* PF Mailbox Registers */
32 /* VF Mailbox Registers */
43 /* PF/VF Mailbox state machine
58 * The diagram above describes the PF/VF mailbox state machine. There
60 * Closed: This state represents a mailbox that is in a standby state
61 * with interrupts disabled. In this state the mailbox should not
62 * read the mailbox or write any data. The only means of exiting
64 * mailbox, it will then transition to the connect state.
65 * Connect: In this state the mailbox is seeking a connection. It will
67 * wait for a reply from the other side of the mailbox. This state
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/Linux-v5.10/drivers/net/ethernet/intel/igb/
De1000_mbx.c7 * igb_read_mbx - Reads a message from the mailbox
11 * @mbx_id: id of mailbox to read
22 /* limit read to size of mailbox */ in igb_read_mbx()
33 * igb_write_mbx - Write a message to the mailbox
37 * @mbx_id: id of mailbox to write
58 * @mbx_id: id of mailbox to check
76 * @mbx_id: id of mailbox to check
94 * @mbx_id: id of mailbox to check
110 * igb_unlock_mbx - unlock the mailbox
112 * @mbx_id: id of mailbox to check
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/Linux-v5.10/drivers/scsi/csiostor/
Dcsio_mb.c51 * csio_mb_fw_retval - FW return value from a mailbox response.
52 * @mbp: Mailbox structure
68 * @mbp: Mailbox structure
69 * @m_mbox: Master mailbox number, if any.
70 * @a_mbox: Mailbox number for asycn notifications.
101 * @mbp: Mailbox structure
102 * @retval: Mailbox return value from Firmware
135 * @mbp: Mailbox structure
156 * @mbp: Mailbox structure
181 * @mbp: Mailbox structure
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/Linux-v5.10/Documentation/devicetree/bindings/power/reset/
Dxlnx,zynqmp-power.txt13 "tx" - Mailbox corresponding to transmit path
14 "rx" - Mailbox corresponding to receive path
15 - mboxes : Standard property to specify a Mailbox. Each value of
17 mailbox controller device node and an args specifier
18 that will be the phandle to the intended sub-mailbox
20 Documentation/devicetree/bindings/mailbox/mailbox.txt
21 for more details about the generic mailbox controller
23 Documentation/devicetree/bindings/mailbox/ \
24 xlnx,zynqmp-ipi-mailbox.txt for typical controller that
45 Example with IPI mailbox method:
/Linux-v5.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_mbx.c10 * ixgbe_read_mbx - Reads a message from the mailbox
14 * @mbx_id: id of mailbox to read
22 /* limit read to size of mailbox */ in ixgbe_read_mbx()
33 * ixgbe_write_mbx - Write a message to the mailbox
37 * @mbx_id: id of mailbox to write
57 * @mbx_id: id of mailbox to check
74 * @mbx_id: id of mailbox to check
91 * @mbx_id: id of mailbox to check
108 * @mbx_id: id of mailbox to write
133 * @mbx_id: id of mailbox to write
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/Linux-v5.10/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.txt4 systems within the Tegra SoC. It is implemented through a mailbox-
16 "rx" - Mailbox for receiving data from hardware UART
17 "tx" - Mailbox for transmitting data to hardware UART
20 This node is a mailbox consumer. See the following files for details of
21 the mailbox subsystem, and the specifiers implemented by the relevant
24 - .../mailbox/mailbox.txt
25 - .../mailbox/nvidia,tegra186-hsp.txt

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