| /Linux-v5.15/drivers/net/ethernet/stmicro/stmmac/ |
| D | hwif.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 u32 reg = readl(priv->ioaddr + id_reg); in stmmac_get_id()
16 dev_info(priv->device, "Version ID not available\n"); in stmmac_get_id()
20 dev_info(priv->device, "User ID: 0x%x, Synopsys ID: 0x%x\n", in stmmac_get_id()
28 u32 reg = readl(priv->ioaddr + id_reg); in stmmac_get_dev_id()
31 dev_info(priv->device, "Version ID not available\n"); in stmmac_get_dev_id()
40 struct mac_device_info *mac = priv->hw; in stmmac_dwmac_mode_quirk() local
42 if (priv->chain_mode) { in stmmac_dwmac_mode_quirk()
43 dev_info(priv->device, "Chain mode enabled\n"); in stmmac_dwmac_mode_quirk()
44 priv->mode = STMMAC_CHAIN_MODE; in stmmac_dwmac_mode_quirk()
[all …]
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| D | hwif.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
13 int __result = -EINVAL; \
14 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) { \
15 (__priv)->hw->__module->__cname((__arg0), ##__args); \
22 int __result = -EINVAL; \
23 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
24 __result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
37 void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic, int mode,
40 void (*init_tx_desc)(struct dma_desc *p, int mode, int end);
43 bool csum_flag, int mode, bool tx_own, bool ls,
[all …]
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| D | dwmac100.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 MAC 10/100 Header File
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
17 /*----------------------------------------------------------------------------
18 * MAC BLOCK defines
19 *---------------------------------------------------------------------------*/
20 /* MAC CSR offset */
21 #define MAC_CONTROL 0x00000000 /* MAC Control */
22 #define MAC_ADDR_HIGH 0x00000004 /* MAC Address High */
23 #define MAC_ADDR_LOW 0x00000008 /* MAC Address Low */
[all …]
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| /Linux-v5.15/include/linux/ |
| D | phylink.h | 21 MLO_AN_FIXED, /* Fixed-link mode */
22 MLO_AN_INBAND, /* In-band protocol */
25 static inline bool phylink_autoneg_inband(unsigned int mode) in phylink_autoneg_inband() argument
27 return mode == MLO_AN_INBAND; in phylink_autoneg_inband()
31 * struct phylink_link_state - link state structure
35 * @interface: link &typedef phy_interface_t mode
37 * @duplex: link duplex mode, one of DUPLEX_* constants.
61 * struct phylink_config - PHYLINK configuration structure
62 * @dev: a pointer to a struct device associated with the MAC
64 * @pcs_poll: MAC PCS cannot provide link change interrupt
[all …]
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| /Linux-v5.15/drivers/staging/rtl8723bs/include/ |
| D | rtw_cmd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
45 u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
47 u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
66 u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
75 INIT_LIST_HEAD(&pcmd->list);\
76 pcmd->cmdcode = code;\
77 pcmd->parmbuf = (u8 *)(pparm);\
78 pcmd->cmdsz = sizeof(*pparm);\
79 pcmd->rsp = NULL;\
[all …]
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| /Linux-v5.15/drivers/staging/rtl8712/ |
| D | rtl871x_cmd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
45 u8 *cmd_buf; /*shall be non-paged, and 4 bytes aligned*/
47 u8 *rsp_buf; /*shall be non-paged, and 4 bytes aligned*/
66 u8 *evt_buf; /*shall be non-paged, and 4 bytes aligned*/
74 INIT_LIST_HEAD(&pcmd->list);\
75 pcmd->cmdcode = code;\
76 pcmd->parmbuf = (u8 *)(pparm);\
77 pcmd->cmdsz = sizeof(*pparm);\
78 pcmd->rsp = NULL;\
[all …]
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| /Linux-v5.15/drivers/staging/r8188eu/include/ |
| D | rtw_cmd.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
40 u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
42 u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
57 u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
64 INIT_LIST_HEAD(&pcmd->list);\
65 pcmd->cmdcode = code;\
66 pcmd->parmbuf = (u8 *)(pparm);\
67 pcmd->cmdsz = sizeof(*pparm);\
68 pcmd->rsp = NULL;\
[all …]
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| /Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/ |
| D | eswitch.c | 14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
62 bool mpfs; /* UC MAC was added to MPFs */
63 /* A flag indicating that mac was added due to mc promiscuous vport */
70 return -EOPNOTSUPP; in mlx5_eswitch_check()
73 return -EOPNOTSUPP; in mlx5_eswitch_check()
87 return dev->priv.eswitch; in mlx5_devlink_eswitch_get()
95 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager)) in mlx5_eswitch_get_vport()
96 return ERR_PTR(-EPERM); in mlx5_eswitch_get_vport()
98 vport = xa_load(&esw->vports, vport_num); in mlx5_eswitch_get_vport()
[all …]
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| /Linux-v5.15/Documentation/networking/ |
| D | sfp-phylink.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 phylink is a mechanism to support hot-pluggable networking modules
11 directly connected to a MAC without needing to re-initialise the
12 adapter on hot-plug events.
14 phylink supports conventional phylib-based setups, fixed link setups
23 1. PHY mode
25 In PHY mode, we use phylib to read the current link settings from
26 the PHY, and pass them to the MAC driver. We expect the MAC driver
30 2. Fixed mode
32 Fixed mode is the same as PHY mode as far as the MAC driver is
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
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| D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC Device Tree Bindings
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
[all …]
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| D | ingenic,mac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ingenic,mac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bindings for MAC in Ingenic SoCs
10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
18 - ingenic,jz4775-mac
19 - ingenic,x1000-mac
20 - ingenic,x1600-mac
21 - ingenic,x1830-mac
[all …]
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| D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: "snps,dwmac.yaml#"
[all …]
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| D | cpsw.txt | 2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
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| D | hisilicon-femac.txt | 1 Hisilicon Fast Ethernet MAC controller
4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
[all …]
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| /Linux-v5.15/drivers/net/ethernet/intel/fm10k/ |
| D | fm10k_vf.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
7 * fm10k_stop_hw_vf - Stop Tx/Rx units
13 u8 *perm_addr = hw->mac.perm_addr; in fm10k_stop_hw_vf()
35 tdlen = hw->mac.itr_scale << FM10K_TDLEN_ITR_SCALE_SHIFT; in fm10k_stop_hw_vf()
40 for (i = 0; i < hw->mac.max_queues; i++) { in fm10k_stop_hw_vf()
45 /* Restore ITR scale in software-defined mechanism in TDLEN in fm10k_stop_hw_vf()
57 * fm10k_reset_hw_vf - VF hardware reset
70 hw->mac.reset_while_pending++; in fm10k_reset_hw_vf()
90 * fm10k_init_hw_vf - VF hardware initialization
[all …]
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| D | fm10k_pf.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
8 * fm10k_reset_hw_pf - PF hardware reset
38 hw->mac.reset_while_pending++; in fm10k_reset_hw_pf()
67 * fm10k_is_ari_hierarchy_pf - Indicate ARI hierarchy support
80 * fm10k_init_hw_pf - PF hardware initialization
106 fm10k_write_reg(hw, FM10K_ITR2(i), i - 1); in fm10k_init_hw_pf()
113 (hw->mac.default_vid << FM10K_TXQCTL_VID_SHIFT); in fm10k_init_hw_pf()
116 /* configure rings for 256 Queue / 32 Descriptor cache mode */ in fm10k_init_hw_pf()
138 switch (hw->bus.speed) { in fm10k_init_hw_pf()
[all …]
|
| /Linux-v5.15/drivers/net/ethernet/hisilicon/hns/ |
| D | hns_dsaf_mac.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2014-2015 Hisilicon Limited.
37 /* check mac addr broadcast */
42 /* check mac addr is 01-00-5e-xx-xx-xx*/
47 /*check the mac addr is 0 in all bit*/
52 /*check mac addr multicast*/
56 void *mac; member
67 /*mac interface keyword */
82 /*mac mode */
84 /**< Invalid Ethernet mode */
[all …]
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| /Linux-v5.15/drivers/of/ |
| D | of_net.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/nvmem-consumer.h>
17 * of_get_phy_mode - Get phy mode for given device_node
21 * The function gets phy interface string from property 'phy-mode' or
22 * 'phy-connection-type'. The index in phy_modes table is set in
24 * PHY_INTERFACE_MODE_NA and an errno is returned, e.g. -ENODEV.
33 err = of_property_read_string(np, "phy-mode", &pm); in of_get_phy_mode()
35 err = of_property_read_string(np, "phy-connection-type", &pm); in of_get_phy_mode()
45 return -ENODEV; in of_get_phy_mode()
53 if (pp && pp->length == ETH_ALEN && is_valid_ether_addr(pp->value)) { in of_get_mac_addr()
[all …]
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| /Linux-v5.15/tools/testing/selftests/bpf/ |
| D | test_xdp_redirect_multi.sh | 2 # SPDX-License-Identifier: GPL-2.0
5 # - - - - - - - - - - - - - - - - - - - - - - - - -
7 # - -| - - - - - - | - - - - - - | - -
8 # --------- --------- ---------
10 # --------- --------- ---------
19 # ns1 -> gw: ns1, ns2, ns3, should receive the arp request
22 # ns1 -> gw: ns1 should not receive, ns2, ns3 should receive redirects.
24 # ping test: ns1 -> ns2 (block), echo requests will be redirect back
26 # all src mac should be egress interface's mac
55 # Kselftest framework requirement - SKIP code is 4.
[all …]
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| /Linux-v5.15/drivers/net/ethernet/wiznet/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 W5100 is a single chip with integrated 10/100 Ethernet MAC,
28 the MAC and PHY functions only, onchip TCP/IP is unused.
39 W5300 is a single chip with integrated 10/100 Ethernet MAC,
41 the MAC and PHY functions only, onchip TCP/IP is unused.
47 prompt "WIZnet interface mode"
52 bool "Direct address bus mode"
54 In direct address mode host system can directly access all registers
55 after mapping to Memory-Mapped I/O space.
58 bool "Indirect address bus mode"
[all …]
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| /Linux-v5.15/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpaa2-mac.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
7 #include "dpaa2-eth.h"
8 #include "dpaa2-mac.h"
34 return -EINVAL; in phy_mode()
48 fwnode = dev_fwnode(dev->parent); in dpaa2_mac_get_node()
59 err = -EINVAL; in dpaa2_mac_get_node()
93 static bool dpaa2_mac_phy_mode_mismatch(struct dpaa2_mac *mac, in dpaa2_mac_phy_mode_mismatch() argument
97 /* We can switch between SGMII and 1000BASE-X at runtime with in dpaa2_mac_phy_mode_mismatch()
98 * pcs-lynx in dpaa2_mac_phy_mode_mismatch()
102 if (mac->pcs && in dpaa2_mac_phy_mode_mismatch()
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/net/dsa/ |
| D | mt7530.txt | 6 - compatible: may be compatible = "mediatek,mt7530"
9 - #address-cells: Must be 1.
10 - #size-cells: Must be 0.
11 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
12 on multi-chip module belong to MT7623A has or the remotely standalone
17 - core-supply: Phandle to the regulator node necessary for the core power.
18 - io-supply: Phandle to the regulator node necessary for the I/O power.
19 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
24 - reset-gpios: Should be a gpio specifier for a reset line.
28 - resets : Phandle pointing to the system reset controller with
[all …]
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| /Linux-v5.15/Documentation/firmware-guide/acpi/dsd/ |
| D | phy.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 for connecting PHYs on the MDIO bus [3] to the MAC layer.
18 daffd814-6eba-4d8c-8a91-bc9bbf4aa301 UUID must be used in the Device
21 phy-handle
22 ----------
23 For each MAC node, a device property "phy-handle" is used to reference
25 network interfaces that have PHYs connected to MAC via MDIO bus.
30 .. code-block:: none
43 Later, during the MAC driver initialization, the registered PHY devices
44 have to be retrieved from the MDIO bus. For this, the MAC driver needs
[all …]
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| /Linux-v5.15/drivers/net/ethernet/sun/ |
| D | sungem.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
39 * This auto-clearing does not occur when the alias at GREG_STAT2
52 #define GREG_STAT_TXMAC 0x00004000 /* TX MAC signalled interrupt */
53 #define GREG_STAT_RXMAC 0x00008000 /* RX MAC signalled interrupt */
54 #define GREG_STAT_MAC 0x00010000 /* MAC Control signalled irq */
69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level
130 * This 13-bit register is programmed by the driver to hold the descriptor
136 * This 13-bit register is updated by GEM to hold to descriptor entry index
146 * maximum value of 0x4ff, else one risks getting TX MAC Underrun errors.
171 * them later. -DaveM
[all …]
|
