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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dfsl,lynx-28g.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,lynx-28g.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Lynx 28G SerDes PHY binding
10 - Ioana Ciornei <ioana.ciornei@nxp.com>
15 - fsl,lynx-28g
20 "#phy-cells":
24 - compatible
25 - reg
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/Linux-v6.1/drivers/phy/freescale/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
41 tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
46 Enable this to add support for the Lynx SerDes 28G PHY as
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o
3 obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o
4 obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
5 obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o
6 obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o
Dphy-fsl-lynx-28g.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2021-2022 NXP. */
23 #define LYNX_28G_LNa_PCC_OFFSET(lane) (4 * (LYNX_28G_NUM_LANE - (lane->id) - 1))
39 #define LYNX_28G_PLLnCR1_FRATE_SEL(cr1) (((cr1) & GENMASK(28, 24)))
63 #define LYNX_28G_LNaTGCR0_USE_PLLS BIT(28)
64 #define LYNX_28G_LNaTGCR0_USE_PLL_MSK BIT(28)
82 #define LYNX_28G_LNaRGCR0_USE_PLLS BIT(28)
83 #define LYNX_28G_LNaRGCR0_USE_PLL_MSK BIT(28)
138 void __iomem *reg = priv->base + off; in lynx_28g_rmw()
148 lynx_28g_rmw((lane)->priv, LYNX_28G_##reg(lane->id), \
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/Linux-v6.1/drivers/ata/
Data_piix.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ata_piix.c - Intel PATA/SATA controllers
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat Inc
10 * Copyright 2003-2005 Jeff Garzik
14 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
15 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
19 * as Documentation/driver-api/libata.rst
40 * PIIX4 errata #9 - Only on ultra obscure hw
41 * ICH3 errata #13 - Not observed to affect real hw
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/Linux-v6.1/arch/alpha/kernel/
Dcore_t2.c1 // SPDX-License-Identifier: GPL-2.0
37 * By default, we direct-map starting at 2GB, in order to allow the
38 * maximum size direct-map window (2GB) to match the maximum amount of
41 * ISA DMA, since the maximum ISA DMA address is 2GB-1.
43 * For now, this seems a reasonable trade-off: even though most SABLEs
62 * NOTE: Herein lie back-to-back mb instructions. They are magic.
68 * BIOS32-style PCI interface:
109 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
111 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
121 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
100 * "srmcons" - early callback prints
101 * "console=srm" - full callback based console, including early prints
136 * i386-setup code. This is just enough to make the console
227 { .name = "rtc", .start = -1, .end = -1 }, in reserve_std_resources()
242 for (hose = hose_head; hose; hose = hose->next) in reserve_std_resources()
243 if (hose->index == 0) { in reserve_std_resources()
244 io = hose->io_space; in reserve_std_resources()
259 for ((_cluster) = (memdesc)->cluster, (i) = 0; \
260 (i) < (memdesc)->numclusters; (i)++, (_cluster)++)
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/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/Linux-v6.1/drivers/usb/host/
Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/io-64-nonatomic-lo-hi.h>
21 /* Code sharing between pci-quirks and xhci hcd */
22 #include "xhci-ext-caps.h"
23 #include "pci-quirks.h"
31 /* Max number of USB devices for any host controller - limit in section 6.1 */
33 /* Section 5.3.3 - MaxPorts */
43 * struct xhci_cap_regs - xHCI Host Controller Capability Registers.
45 * @hcs_params1: HCSPARAMS1 - Structural Parameters 1
46 * @hcs_params2: HCSPARAMS2 - Structural Parameters 2
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/Linux-v6.1/drivers/net/ethernet/intel/e1000e/
Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* 82562G 10/100 Network Connection
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
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/Linux-v6.1/drivers/pci/
Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
64 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
65 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
66 (f->vendor == dev->vendor || in pci_do_fixups()
67 f->vendor == (u16) PCI_ANY_ID) && in pci_do_fixups()
68 (f->device == dev->device || in pci_do_fixups()
69 f->device == (u16) PCI_ANY_ID)) { in pci_do_fixups()
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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