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/Linux-v6.6/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,ls1x-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 Interrupt Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 interrupt controller is connected to the MIPS core interrupt
18 const: loongson,ls1x-intc
23 interrupt-controller: true
25 '#interrupt-cells':
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/Linux-v6.6/drivers/irqchip/
Dirq-ls1x.c1 // SPDX-License-Identifier: GPL-2.0
4 * Loongson-1 platform IRQ support
26 * struct ls1x_intc_priv - private ls1x-intc data.
28 * @intc_base: IO Base of intc registers.
44 pending = readl(priv->intc_base + LS_REG_INTC_STATUS) & in ls1x_chained_handle_irq()
45 readl(priv->intc_base + LS_REG_INTC_EN); in ls1x_chained_handle_irq()
53 generic_handle_domain_irq(priv->domain, bit); in ls1x_chained_handle_irq()
65 writel(readl(gc->reg_base + offset) | mask, in ls_intc_set_bit()
66 gc->reg_base + offset); in ls_intc_set_bit()
68 writel(readl(gc->reg_base + offset) & ~mask, in ls_intc_set_bit()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
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/Linux-v6.6/arch/mips/loongson32/common/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_ack()
26 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; in ls1x_irq_ack()
34 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask()
35 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; in ls1x_irq_mask()
43 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask_ack()
44 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; in ls1x_irq_mask_ack()
54 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_unmask()
55 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; in ls1x_irq_unmask()
63 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_settype()
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