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/Linux-v5.15/tools/perf/pmu-events/arch/powerpc/power8/
D	cache.json	6 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 12 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 18 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefe… 36 …location other than the local core's L2 due to either only demand loads or demand loads plus prefe… 42 … core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefe… 48 … local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefe… 54 …ithout dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefe… 60 …d from local core's L2 without conflict due to either only demand loads or demand loads plus prefe… 66 …cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefe… [all …]
D	other.json	365 … and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch", 371 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 372 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 377 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", 378 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe… 383 …ther chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch", 384 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 389 …her chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch", 390 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 395 …cessor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch", [all …]
D	memory.json	18 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe… 24 …s reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefe… 30 …cluding L4 from local remote or distant due to either only demand loads or demand loads plus prefe… 36 … L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe… 42 …ory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe…
/Linux-v5.15/tools/perf/util/
D	mem-events.h	66 u32 load; /* count of all loads in trace / 67 u32 ld_excl; / exclusive loads, rmt/lcl DRAM - snp none/miss / 68 u32 ld_shared; / shared loads, rmt/lcl DRAM - snp hit / 69 u32 ld_uncache; / loads to uncacheable address / 70 u32 ld_io; / loads to io address / 71 u32 ld_miss; / loads miss / 73 u32 ld_fbhit; / count of loads hitting Fill Buffer / 74 u32 ld_l1hit; / count of loads that hit L1D / 75 u32 ld_l2hit; / count of loads that hit L2D / 76 u32 ld_llchit; / count of loads that hit LLC */ [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/ivybridge/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 42 "PublicDescription": "Loads with latency value being above 4.", 50 "BriefDescription": "Loads with latency value being above 4", 56 "PublicDescription": "Loads with latency value being above 8.", 64 "BriefDescription": "Loads with latency value being above 8", 70 "PublicDescription": "Loads with latency value being above 16.", 78 "BriefDescription": "Loads with latency value being above 16", 84 "PublicDescription": "Loads with latency value being above 32.", 92 "BriefDescription": "Loads with latency value being above 32", 98 "PublicDescription": "Loads with latency value being above 64.", [all …]
/Linux-v5.15/tools/perf/arch/x86/util/
D	mem-events.c	`11 #define MEM_LOADS_AUX_NAME "{%s/mem-loads-aux/,%s/mem-loads,ldlat=%u/}:P" 16 E("ldlat-loads", "%s/mem-loads,ldlat=%u/P", "%s/events/mem-loads"), 32 if (!pmu_have_event("cpu", "mem-loads-aux")) in is_mem_loads_aux_event() 35 if (!pmu_have_event("cpu_core", "mem-loads-aux")) in is_mem_loads_aux_event() 58 if (pmu_have_event(pmu_name, "mem-loads-aux")) { in perf_mem_events__name()`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/icelakex/
D	memory.json	164 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 174 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 180 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 190 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 196 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 206 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 212 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 222 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 228 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 238 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… [all …]
D	icx-metrics.json	117 … "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads (in core cycles)", 160 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads", 166 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads", 178 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads", 238 …ata read request to external memory (in nanoseconds). Accounts for demand loads and L1/L2 prefetch… 244 …er of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetch… 250 …quest to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-rea…
/Linux-v5.15/tools/perf/pmu-events/arch/x86/tigerlake/
D	memory.json	25 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 35 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 41 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 51 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 57 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 67 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 73 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 83 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 89 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 99 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellde/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Loads with latency value being above 4", 322 "PublicDescription": "This event counts loads with latency value being above four.", 330 "BriefDescription": "Loads with latency value being above 8", 337 "PublicDescription": "This event counts loads with latency value being above eight.", 345 "BriefDescription": "Loads with latency value being above 16", 352 "PublicDescription": "This event counts loads with latency value being above 16.", 360 "BriefDescription": "Loads with latency value being above 32", 367 "PublicDescription": "This event counts loads with latency value being above 32.", 375 "BriefDescription": "Loads with latency value being above 64", [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/ivytown/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 33 "PublicDescription": "Loads with latency value being above 4.", 41 "BriefDescription": "Loads with latency value being above 4", 47 "PublicDescription": "Loads with latency value being above 8.", 55 "BriefDescription": "Loads with latency value being above 8", 61 "PublicDescription": "Loads with latency value being above 16.", 69 "BriefDescription": "Loads with latency value being above 16", 75 "PublicDescription": "Loads with latency value being above 32.", 83 "BriefDescription": "Loads with latency value being above 32", 89 "PublicDescription": "Loads with latency value being above 64.", [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/icelake/
D	memory.json	41 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 51 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 159 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 169 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 369 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 379 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 385 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 395 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… 413 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 423 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl… [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellx/
D	memory.json	7 "EventName": "MISALIGN_MEM_REF.LOADS", 315 "BriefDescription": "Randomly selected loads with latency value being above 4", 322 "PublicDescription": "Counts randomly selected loads with latency value being above four.", 330 "BriefDescription": "Randomly selected loads with latency value being above 8", 337 "PublicDescription": "Counts randomly selected loads with latency value being above eight.", 345 "BriefDescription": "Randomly selected loads with latency value being above 16", 352 "PublicDescription": "Counts randomly selected loads with latency value being above 16.", 360 "BriefDescription": "Randomly selected loads with latency value being above 32", 367 "PublicDescription": "Counts randomly selected loads with latency value being above 32.", 375 "BriefDescription": "Randomly selected loads with latency value being above 64", [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/jaketown/
D	memory.json	21 "BriefDescription": "Loads with latency value being above 4 .", 34 "BriefDescription": "Loads with latency value being above 8.", 47 "BriefDescription": "Loads with latency value being above 16.", 60 "BriefDescription": "Loads with latency value being above 32.", 73 "BriefDescription": "Loads with latency value being above 64.", 86 "BriefDescription": "Loads with latency value being above 128.", 99 "BriefDescription": "Loads with latency value being above 256.", 112 "BriefDescription": "Loads with latency value being above 512.", 132 "EventName": "MISALIGN_MEM_REF.LOADS",
/Linux-v5.15/tools/arch/powerpc/include/asm/
D	barrier.h	`16 * loads and stores to non-cacheable memory (e.g. I/O devices). 18 * mb() prevents loads and stores being reordered across this point. 19 * rmb() prevents loads being reordered across this point.`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/sandybridge/
D	memory.json	6 "EventName": "MISALIGN_MEM_REF.LOADS", 48 "BriefDescription": "Loads with latency value being above 4 .", 61 "BriefDescription": "Loads with latency value being above 8.", 74 "BriefDescription": "Loads with latency value being above 16.", 87 "BriefDescription": "Loads with latency value being above 32.", 100 "BriefDescription": "Loads with latency value being above 64.", 113 "BriefDescription": "Loads with latency value being above 128.", 126 "BriefDescription": "Loads with latency value being above 256.", 139 "BriefDescription": "Loads with latency value being above 512.",
/Linux-v5.15/arch/powerpc/include/asm/
D	barrier.h	`20 * loads and stores to non-cacheable memory (e.g. I/O devices). 22 * mb() prevents loads and stores being reordered across this point. 23 * rmb() prevents loads being reordered across this point. 32 * doesn't order loads with respect to previous stores. Lwsync can be`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/westmereep-sp/
D	other.json	`88 "BriefDescription": "Loads that partially overlap an earlier store" 96 "BriefDescription": "All loads dispatched" 104 "BriefDescription": "Loads dispatched from the MOB" 112 "BriefDescription": "Loads dispatched that bypass the MOB" 120 "BriefDescription": "Loads dispatched from stage 305"`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/westmereex/
D	other.json	`88 "BriefDescription": "Loads that partially overlap an earlier store" 96 "BriefDescription": "All loads dispatched" 104 "BriefDescription": "Loads dispatched from the MOB" 112 "BriefDescription": "Loads dispatched that bypass the MOB" 120 "BriefDescription": "Loads dispatched from stage 305"`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/westmereep-dp/
D	other.json	`88 "BriefDescription": "Loads that partially overlap an earlier store" 96 "BriefDescription": "All loads dispatched" 104 "BriefDescription": "Loads dispatched from the MOB" 112 "BriefDescription": "Loads dispatched that bypass the MOB" 120 "BriefDescription": "Loads dispatched from stage 305"`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/elkhartlake/
D	virtual-memory.json	3 …"BriefDescription": "Counts the number of page walks due to loads that miss the PDE (Page Director… 14 …"Counts the number of first level TLB misses but second level hits due to loads that did not start… 31 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 43 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 55 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 60 …Counts the number of page walks outstanding in the page miss handler (PMH) for loads every cycle.", 67 …s the number of page walks outstanding in the page miss handler (PMH) for loads every cycle. A pa…
/Linux-v5.15/tools/perf/pmu-events/arch/x86/nehalemep/
D	other.json	`88 "BriefDescription": "All loads dispatched" 96 "BriefDescription": "Loads dispatched from the MOB" 104 "BriefDescription": "Loads dispatched that bypass the MOB" 112 "BriefDescription": "Loads dispatched from stage 305"`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/nehalemex/
D	other.json	`88 "BriefDescription": "All loads dispatched" 96 "BriefDescription": "Loads dispatched from the MOB" 104 "BriefDescription": "Loads dispatched that bypass the MOB" 112 "BriefDescription": "Loads dispatched from stage 305"`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/amdzen1/
D	memory.json	`23 "BriefDescription": "Counts the number of loads dispatched to the LS unit. Unit Masks ADDed.", 49 "EventName": "ls_mab_alloc.loads", 51 "BriefDescription": "LS MAB allocates by type - loads.", 147 "BriefDescription": "Misaligned loads."`
/Linux-v5.15/tools/memory-model/Documentation/
D	explanation.txt	78 for the loads, the model will predict whether it is possible for the 79 code to run in such a way that the loads will indeed obtain the 141 shared memory locations and another CPU loads from those locations in 153 A memory model will predict what values P1 might obtain for its loads 196 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from 197 it, as loads can obtain values only from earlier stores. 199 P1 loads from flag before loading from buf, since CPUs execute 222 each CPU stores to its own shared location and then loads from the 271 X: P1 loads 1 from flag executes before 272 Y: P1 loads 0 from buf executes before [all …]

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