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/Linux-v5.4/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h30 …C_I2C_SW_DONE 1 // DC_I2C SW done DC_I2C_SW_DONE_INTERRUPT DISP_INTERRUPT_STATUS Level
33 … // DC_I2C DDC1 HW done DOUT_IHC_I2C_DDC1_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
36 … // DC_I2C DDC2 HW done DOUT_IHC_I2C_DDC2_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
39 … // DC_I2C DDC3 HW done DOUT_IHC_I2C_DDC3_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
42 … // DC_I2C_DDC4 HW done DOUT_IHC_I2C_DDC4_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
45 … // DC_I2C_DDC5 HW done DOUT_IHC_I2C_DDC5_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
48 … // DC_I2C_DDC6 HW done DOUT_IHC_I2C_DDC6_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
51 …DC_I2C_DDCVGA HW done DOUT_IHC_I2C_DDCVGA_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
54 …DC1 read request DC_I2C_DDC1_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
57 …DC2 read request DC_I2C_DDC2_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
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/Linux-v5.4/fs/nilfs2/
Dbtree.c26 int level = NILFS_BTREE_LEVEL_DATA; in nilfs_btree_alloc_path() local
32 for (; level < NILFS_BTREE_LEVEL_MAX; level++) { in nilfs_btree_alloc_path()
33 path[level].bp_bh = NULL; in nilfs_btree_alloc_path()
34 path[level].bp_sib_bh = NULL; in nilfs_btree_alloc_path()
35 path[level].bp_index = 0; in nilfs_btree_alloc_path()
36 path[level].bp_oldreq.bpr_ptr = NILFS_BMAP_INVALID_PTR; in nilfs_btree_alloc_path()
37 path[level].bp_newreq.bpr_ptr = NILFS_BMAP_INVALID_PTR; in nilfs_btree_alloc_path()
38 path[level].bp_op = NULL; in nilfs_btree_alloc_path()
47 int level = NILFS_BTREE_LEVEL_DATA; in nilfs_btree_free_path() local
49 for (; level < NILFS_BTREE_LEVEL_MAX; level++) in nilfs_btree_free_path()
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/Linux-v5.4/arch/s390/include/asm/
Ddebug.h18 #define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */
22 #define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */
38 int level; member
90 debug_entry_t *debug_event_common(debug_info_t *id, int level,
93 debug_entry_t *debug_exception_common(debug_info_t *id, int level,
115 * level would be logged. Otherwise returns false.
118 * @level: debug level
121 * - %true if level is less or equal to the current debug level.
123 static inline bool debug_level_enabled(debug_info_t *id, int level) in debug_level_enabled() argument
125 return level <= id->level; in debug_level_enabled()
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/Linux-v5.4/fs/xfs/scrub/
Dbtree.c28 int level, in __xchk_btree_process_error() argument
49 trace_xchk_ifork_btree_op_error(sc, cur, level, in __xchk_btree_process_error()
52 trace_xchk_btree_op_error(sc, cur, level, in __xchk_btree_process_error()
63 int level, in xchk_btree_process_error() argument
66 return __xchk_btree_process_error(sc, cur, level, error, in xchk_btree_process_error()
74 int level, in xchk_btree_xref_process_error() argument
77 return __xchk_btree_process_error(sc, cur, level, error, in xchk_btree_xref_process_error()
86 int level, in __xchk_btree_set_corrupt() argument
93 trace_xchk_ifork_btree_error(sc, cur, level, in __xchk_btree_set_corrupt()
96 trace_xchk_btree_error(sc, cur, level, in __xchk_btree_set_corrupt()
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Ddabtree.c32 int level, in xchk_da_process_error() argument
54 ds->state->path.blk[level].blkno), in xchk_da_process_error()
68 int level) in xchk_da_set_corrupt() argument
76 ds->state->path.blk[level].blkno), in xchk_da_set_corrupt()
80 /* Find an entry at a certain level in a da btree. */
84 int level, in xchk_da_btree_entry() argument
92 blk = &ds->state->path.blk[level]; in xchk_da_btree_entry()
120 int level, in xchk_da_btree_hash() argument
130 if (hash < ds->hashes[level]) in xchk_da_btree_hash()
131 xchk_da_set_corrupt(ds, level); in xchk_da_btree_hash()
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/Linux-v5.4/arch/arm64/kernel/
Dcacheinfo.c13 #define MAX_CACHE_LEVEL 7 /* Max 7 level supported */
15 #define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1)) argument
16 #define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level)) argument
17 #define CLIDR_CTYPE(clidr, level) \ argument
18 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
29 static inline enum cache_type get_cache_type(int level) in get_cache_type() argument
33 if (level > MAX_CACHE_LEVEL) in get_cache_type()
36 return CLIDR_CTYPE(clidr, level); in get_cache_type()
40 enum cache_type type, unsigned int level) in ci_leaf_init() argument
42 this_leaf->level = level; in ci_leaf_init()
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/Linux-v5.4/arch/arm/
DKconfig.debug104 bool "Kernel low-level debugging functions (read help!)"
117 prompt "Kernel low-level debugging port"
121 bool "Kernel low-level debugging messages via Alpine UART0"
125 Say Y here if you want kernel low-level debugging support
129 bool "Kernel low-level debugging via asm9260 UART"
150 bool "Kernel low-level debugging on AT91RM9200, AT91SAM9 DBGU"
154 Say Y here if you want kernel low-level debugging support
160 bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU"
164 Say Y here if you want kernel low-level debugging support
170 bool "Kernel low-level debugging on SAMA5D2 UART1"
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/Linux-v5.4/arch/sparc/kernel/
Dcpumap.c26 /* Increment rover every time level is visited */
34 int level; member
43 int start_index; /* Index of first node of a level in a cpuinfo tree */
44 int end_index; /* Index of last node of a level in a cpuinfo tree */
45 int num_nodes; /* Number of nodes in a level in a cpuinfo tree */
51 /* Offsets into nodes[] for each level of the tree */
52 struct cpuinfo_level level[CPUINFO_LVL_MAX]; member
96 static int cpuinfo_id(int cpu, int level) in cpuinfo_id() argument
100 switch (level) { in cpuinfo_id()
121 * end index, and number of nodes for each level in the cpuinfo tree. The
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/Linux-v5.4/arch/sparc/include/uapi/asm/
Dtraps.h46 #define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */
47 #define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */
48 #define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */
49 #define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */
50 #define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */
51 #define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */
52 #define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */
53 #define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */
54 #define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */
55 #define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_z13/
Dextended.json7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
28 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
35 …r:132 Name:DTLB1_GPAGE_WRITES A translation entry has been written to the Level-1 Data Translation…
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
49 …"PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation …
56 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …"PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arr…
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/Linux-v5.4/security/selinux/ss/
Dcontext.h45 dst->range.level[0].sens = src->range.level[0].sens; in mls_context_cpy()
46 rc = ebitmap_cpy(&dst->range.level[0].cat, &src->range.level[0].cat); in mls_context_cpy()
50 dst->range.level[1].sens = src->range.level[1].sens; in mls_context_cpy()
51 rc = ebitmap_cpy(&dst->range.level[1].cat, &src->range.level[1].cat); in mls_context_cpy()
53 ebitmap_destroy(&dst->range.level[0].cat); in mls_context_cpy()
59 * Sets both levels in the MLS range of 'dst' to the low level of 'src'.
65 dst->range.level[0].sens = src->range.level[0].sens; in mls_context_cpy_low()
66 rc = ebitmap_cpy(&dst->range.level[0].cat, &src->range.level[0].cat); in mls_context_cpy_low()
70 dst->range.level[1].sens = src->range.level[0].sens; in mls_context_cpy_low()
71 rc = ebitmap_cpy(&dst->range.level[1].cat, &src->range.level[0].cat); in mls_context_cpy_low()
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_zec12/
Dextended.json7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
21 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
28 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
35 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
42 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
49 …"PublicDescription": "A directory write to the Level-1 Data cache where the installed cache line w…
56 …"PublicDescription": "A directory write to the Level-1 Instruction cache where the installed cache…
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_z14/
Dextended.json7 …"PublicDescription": "L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the lin…
21 …he data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on th…
28 …was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-me…
35 …"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
56 …ruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cach…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …cDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
77 …he Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
84 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_z15/
Dextended.json7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
21 …he data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on th…
28 …was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-me…
35 …"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
56 …ruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cach…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …cDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
77 …he Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
84 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_z196/
Dextended.json7 …iption": "A directory write to the Level-1 D-Cache directory where the returned cache line was sou…
14 …iption": "A directory write to the Level-1 I-Cache directory where the returned cache line was sou…
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
28 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache"
42 …on": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced…
49 …ion": "A directory write to the Level-1 D-Cache directory where the returned cache line was source…
56 …ion": "A directory write to the Level-1 I-Cache directory where the returned cache line was source…
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …on": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced…
[all …]
/Linux-v5.4/drivers/scsi/
Dscsi_logging.h47 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) \ argument
49 if (unlikely((SCSI_LOG_LEVEL(SHIFT, BITS)) > (LEVEL))) \
56 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) argument
64 #define SCSI_LOG_ERROR_RECOVERY(LEVEL,CMD) \ argument
65 SCSI_CHECK_LOGGING(SCSI_LOG_ERROR_SHIFT, SCSI_LOG_ERROR_BITS, LEVEL,CMD);
66 #define SCSI_LOG_TIMEOUT(LEVEL,CMD) \ argument
67 SCSI_CHECK_LOGGING(SCSI_LOG_TIMEOUT_SHIFT, SCSI_LOG_TIMEOUT_BITS, LEVEL,CMD);
68 #define SCSI_LOG_SCAN_BUS(LEVEL,CMD) \ argument
69 SCSI_CHECK_LOGGING(SCSI_LOG_SCAN_SHIFT, SCSI_LOG_SCAN_BITS, LEVEL,CMD);
70 #define SCSI_LOG_MLQUEUE(LEVEL,CMD) \ argument
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/Linux-v5.4/arch/s390/numa/
Dtoptree.c22 * @level: The node's vertical level; level 0 contains the leaves.
30 struct toptree __ref *toptree_alloc(int level, int id) in toptree_alloc() argument
44 res->level = level; in toptree_alloc()
126 if (target->level != (cand->level + 1)) in toptree_insert()
162 if (cand->level < 2) in toptree_unify()
165 cand_copy = toptree_alloc(cand->level, 0); in toptree_unify()
187 * In the easiest case @cand is exactly on the level below @target
190 * If @target's level is not the direct parent level of @cand,
202 if (cand->level + 1 == target->level) { in toptree_move()
214 stack_target = toptree_alloc(ptr->level + 1, in toptree_move()
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/Linux-v5.4/tools/perf/pmu-events/arch/s390/cf_z10/
Dextended.json7 …iption": "A directory write to the Level-1 I-Cache directory where the returned cache line was sou…
14 …iption": "A directory write to the Level-1 D-Cache directory where the installed cache line was so…
21 …iption": "A directory write to the Level-1 I-Cache directory where the installed cache line was so…
28 …ption": "A directory write to the Level-1 D-Cache directory where the installtion cache line was s…
35 …ription": "A directory write to the Level-1 I-Cache directory where the installed cache line was s…
42 …ription": "A directory write to the Level-1 D-Cache directory where the installed cache line was s…
49 …"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache…
56 …"PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was …
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …licDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same …
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/Linux-v5.4/tools/perf/pmu-events/arch/arm64/ampere/emag/
Dcache.json42 "PublicDescription": "Level 1 instruction cache refill",
48 "PublicDescription": "Level 1 instruction TLB refill",
54 "PublicDescription": "Level 1 data cache refill",
60 "PublicDescription": "Level 1 data cache access",
66 "PublicDescription": "Level 1 data TLB refill",
72 "PublicDescription": "Level 1 instruction cache access",
78 "PublicDescription": "Level 2 data cache access",
84 "PublicDescription": "Level 2 data refill",
90 "PublicDescription": "Level 2 data cache, Write-Back",
96 …"PublicDescription": "Level 1 data TLB access. This event counts any load or store operation which…
[all …]
/Linux-v5.4/fs/xfs/libxfs/
Dxfs_btree.c60 int level, in __xfs_btree_check_lblock() argument
79 if (be16_to_cpu(block->bb_level) != level) in __xfs_btree_check_lblock()
82 cur->bc_ops->get_maxrecs(cur, level)) in __xfs_btree_check_lblock()
86 level + 1)) in __xfs_btree_check_lblock()
90 level + 1)) in __xfs_btree_check_lblock()
101 int level, in xfs_btree_check_lblock() argument
107 fa = __xfs_btree_check_lblock(cur, block, level, bp); in xfs_btree_check_lblock()
126 int level, in __xfs_btree_check_sblock() argument
143 if (be16_to_cpu(block->bb_level) != level) in __xfs_btree_check_sblock()
146 cur->bc_ops->get_maxrecs(cur, level)) in __xfs_btree_check_sblock()
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/Linux-v5.4/tools/perf/pmu-events/arch/arm64/
Darmv8-recommended.json3 "PublicDescription": "Attributable Level 1 data cache access, read",
9 "PublicDescription": "Attributable Level 1 data cache access, write",
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
27 "PublicDescription": "Attributable Level 1 data cache refill, inner",
33 "PublicDescription": "Attributable Level 1 data cache refill, outer",
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency",
51 "PublicDescription": "Attributable Level 1 data cache invalidate",
57 "PublicDescription": "Attributable Level 1 data TLB refill, read",
[all …]
/Linux-v5.4/arch/s390/kernel/
Dcache.c80 seq_printf(m, "level=%d ", cache->level); in show_cacheinfo()
91 static inline enum cache_type get_cache_type(struct cache_info *ci, int level) in get_cache_type() argument
93 if (level >= CACHE_MAX_LEVEL) in get_cache_type()
95 ci += level; in get_cache_type()
107 enum cache_type type, unsigned int level, int cpu) in ci_leaf_init() argument
115 this_leaf->level = level + 1; in ci_leaf_init()
117 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti); in ci_leaf_init()
118 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti); in ci_leaf_init()
119 this_leaf->size = ecag(EXTRACT_SIZE, level, ti); in ci_leaf_init()
131 unsigned int level = 0, leaves = 0; in init_cache_level() local
[all …]
/Linux-v5.4/arch/riscv/kernel/
Dcacheinfo.c13 enum cache_type type, unsigned int level) in ci_leaf_init() argument
15 this_leaf->level = level; in ci_leaf_init()
24 int levels = 0, leaves = 0, level; in __init_cache_level() local
41 if (of_property_read_u32(np, "cache-level", &level)) in __init_cache_level()
43 if (level <= levels) in __init_cache_level()
51 levels = level; in __init_cache_level()
67 int levels = 1, level = 1; in __populate_cache_leaves() local
70 ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level); in __populate_cache_leaves()
72 ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level); in __populate_cache_leaves()
74 ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level); in __populate_cache_leaves()
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/Linux-v5.4/drivers/scsi/esas2r/
Desas2r_log.c48 * the event_log_level module parameter controls the level of messages that are
49 * written to the system log. the default level of messages that are written
57 * to the system log. if critical, warning, and information-level messages are
70 …"Specifies the level of events to report to the system log. Critical and warning level events are…
79 * translates an esas2r-defined logging event level to a kernel logging level.
81 * @param [in] level the esas2r-defined logging event level to translate
83 * @return the corresponding kernel logging level.
85 static const char *translate_esas2r_event_level_to_kernel(const long level) in translate_esas2r_event_level_to_kernel() argument
87 switch (level) { in translate_esas2r_event_level_to_kernel()
109 * @param [in] level the event log level of the message
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/Linux-v5.4/Documentation/infiniband/
Dcore_locking.rst7 both low-level drivers that sit below the midlayer and upper level
13 With the following exceptions, a low-level driver implementation of
29 The corresponding functions exported to upper level protocol
47 used by low-level drivers to dispatch asynchronous events through
53 All of the methods in struct ib_device exported by a low-level
54 driver must be fully reentrant. The low-level driver is required to
61 Because low-level drivers are reentrant, upper level protocol
71 A low-level driver must not perform a callback directly from the
73 allowed for a low-level driver to call a consumer's completion event
74 handler directly from its post_send method. Instead, the low-level
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