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/Linux-v5.15/drivers/gpu/drm/amd/include/ivsrcid/dcn/
Dirqsrcs_dcn_1_0.h30 …C_I2C_SW_DONE 1 // DC_I2C SW done DC_I2C_SW_DONE_INTERRUPT DISP_INTERRUPT_STATUS Level
33 … // DC_I2C DDC1 HW done DOUT_IHC_I2C_DDC1_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
36 … // DC_I2C DDC2 HW done DOUT_IHC_I2C_DDC2_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
39 … // DC_I2C DDC3 HW done DOUT_IHC_I2C_DDC3_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
42 … // DC_I2C_DDC4 HW done DOUT_IHC_I2C_DDC4_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
45 … // DC_I2C_DDC5 HW done DOUT_IHC_I2C_DDC5_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
48 … // DC_I2C_DDC6 HW done DOUT_IHC_I2C_DDC6_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
51 …DC_I2C_DDCVGA HW done DOUT_IHC_I2C_DDCVGA_HW_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level
54 …DC1 read request DC_I2C_DDC1_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
57 …DC2 read request DC_I2C_DDC2_READ_REQUEST_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE21 Level / Pulse
[all …]
/Linux-v5.15/fs/nilfs2/
Dbtree.c26 int level = NILFS_BTREE_LEVEL_DATA; in nilfs_btree_alloc_path() local
32 for (; level < NILFS_BTREE_LEVEL_MAX; level++) { in nilfs_btree_alloc_path()
33 path[level].bp_bh = NULL; in nilfs_btree_alloc_path()
34 path[level].bp_sib_bh = NULL; in nilfs_btree_alloc_path()
35 path[level].bp_index = 0; in nilfs_btree_alloc_path()
36 path[level].bp_oldreq.bpr_ptr = NILFS_BMAP_INVALID_PTR; in nilfs_btree_alloc_path()
37 path[level].bp_newreq.bpr_ptr = NILFS_BMAP_INVALID_PTR; in nilfs_btree_alloc_path()
38 path[level].bp_op = NULL; in nilfs_btree_alloc_path()
47 int level = NILFS_BTREE_LEVEL_DATA; in nilfs_btree_free_path() local
49 for (; level < NILFS_BTREE_LEVEL_MAX; level++) in nilfs_btree_free_path()
[all …]
/Linux-v5.15/arch/arm/
DKconfig.debug106 bool "Kernel low-level debugging functions (read help!)"
119 prompt "Kernel low-level debugging port"
123 bool "Kernel low-level debugging messages via Alpine UART0"
127 Say Y here if you want kernel low-level debugging support
131 bool "Kernel low-level debugging via asm9260 UART"
152 bool "Kernel low-level debugging on AT91RM9200, AT91SAM9, SAM9X60 DBGU"
156 Say Y here if you want kernel low-level debugging support
162 bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU"
166 Say Y here if you want kernel low-level debugging support
172 bool "Kernel low-level debugging on SAMA5D2 UART1"
[all …]
/Linux-v5.15/security/selinux/ss/
Dcontext.h45 dst->range.level[0].sens = src->range.level[0].sens; in mls_context_cpy()
46 rc = ebitmap_cpy(&dst->range.level[0].cat, &src->range.level[0].cat); in mls_context_cpy()
50 dst->range.level[1].sens = src->range.level[1].sens; in mls_context_cpy()
51 rc = ebitmap_cpy(&dst->range.level[1].cat, &src->range.level[1].cat); in mls_context_cpy()
53 ebitmap_destroy(&dst->range.level[0].cat); in mls_context_cpy()
59 * Sets both levels in the MLS range of 'dst' to the low level of 'src'.
65 dst->range.level[0].sens = src->range.level[0].sens; in mls_context_cpy_low()
66 rc = ebitmap_cpy(&dst->range.level[0].cat, &src->range.level[0].cat); in mls_context_cpy_low()
70 dst->range.level[1].sens = src->range.level[0].sens; in mls_context_cpy_low()
71 rc = ebitmap_cpy(&dst->range.level[1].cat, &src->range.level[0].cat); in mls_context_cpy_low()
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/Linux-v5.15/arch/s390/include/asm/
Ddebug.h19 #define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */
23 #define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */
35 unsigned long level : 3; member
49 int level; member
100 debug_entry_t *debug_event_common(debug_info_t *id, int level,
103 debug_entry_t *debug_exception_common(debug_info_t *id, int level,
125 * level would be logged. Otherwise returns false.
128 * @level: debug level
131 * - %true if level is less or equal to the current debug level.
133 static inline bool debug_level_enabled(debug_info_t *id, int level) in debug_level_enabled() argument
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/Linux-v5.15/arch/arm64/kernel/
Dcacheinfo.c13 #define MAX_CACHE_LEVEL 7 /* Max 7 level supported */
15 #define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1)) argument
16 #define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level)) argument
17 #define CLIDR_CTYPE(clidr, level) \ argument
18 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
29 static inline enum cache_type get_cache_type(int level) in get_cache_type() argument
33 if (level > MAX_CACHE_LEVEL) in get_cache_type()
36 return CLIDR_CTYPE(clidr, level); in get_cache_type()
40 enum cache_type type, unsigned int level) in ci_leaf_init() argument
42 this_leaf->level = level; in ci_leaf_init()
[all …]
/Linux-v5.15/fs/xfs/scrub/
Ddabtree.c32 int level, in xchk_da_process_error() argument
54 ds->state->path.blk[level].blkno), in xchk_da_process_error()
68 int level) in xchk_da_set_corrupt() argument
76 ds->state->path.blk[level].blkno), in xchk_da_set_corrupt()
83 int level) in xchk_da_btree_node_entry() argument
85 struct xfs_da_state_blk *blk = &ds->state->path.blk[level]; in xchk_da_btree_node_entry()
98 int level, in xchk_da_btree_hash() argument
107 if (hash < ds->hashes[level]) in xchk_da_btree_hash()
108 xchk_da_set_corrupt(ds, level); in xchk_da_btree_hash()
109 ds->hashes[level] = hash; in xchk_da_btree_hash()
[all …]
Dbtree.c29 int level, in __xchk_btree_process_error() argument
50 trace_xchk_ifork_btree_op_error(sc, cur, level, in __xchk_btree_process_error()
53 trace_xchk_btree_op_error(sc, cur, level, in __xchk_btree_process_error()
64 int level, in xchk_btree_process_error() argument
67 return __xchk_btree_process_error(sc, cur, level, error, in xchk_btree_process_error()
75 int level, in xchk_btree_xref_process_error() argument
78 return __xchk_btree_process_error(sc, cur, level, error, in xchk_btree_xref_process_error()
87 int level, in __xchk_btree_set_corrupt() argument
94 trace_xchk_ifork_btree_error(sc, cur, level, in __xchk_btree_set_corrupt()
97 trace_xchk_btree_error(sc, cur, level, in __xchk_btree_set_corrupt()
[all …]
/Linux-v5.15/arch/sparc/kernel/
Dcpumap.c26 /* Increment rover every time level is visited */
34 int level; member
43 int start_index; /* Index of first node of a level in a cpuinfo tree */
44 int end_index; /* Index of last node of a level in a cpuinfo tree */
45 int num_nodes; /* Number of nodes in a level in a cpuinfo tree */
51 /* Offsets into nodes[] for each level of the tree */
52 struct cpuinfo_level level[CPUINFO_LVL_MAX]; member
96 static int cpuinfo_id(int cpu, int level) in cpuinfo_id() argument
100 switch (level) { in cpuinfo_id()
121 * end index, and number of nodes for each level in the cpuinfo tree. The
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/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z13/
Dextended.json7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
28 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
35 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
49 …"PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation …
56 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …"PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arr…
[all …]
/Linux-v5.15/arch/sparc/include/uapi/asm/
Dtraps.h46 #define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */
47 #define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */
48 #define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */
49 #define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */
50 #define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */
51 #define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */
52 #define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */
53 #define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */
54 #define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */
55 #define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_zec12/
Dextended.json7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
21 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
28 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
35 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
42 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
49 …"PublicDescription": "A directory write to the Level-1 Data cache where the installed cache line w…
56 …"PublicDescription": "A directory write to the Level-1 Instruction cache where the installed cache…
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z14/
Dextended.json7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
21 …he data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on th…
28 …was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-me…
35 …"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
56 …ruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cach…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …cDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
77 …he Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
84 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
[all …]
/Linux-v5.15/arch/arm64/boot/dts/rockchip/
Drockchip-pinconf.dtsi23 pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 {
29 pcfg_pull_none_drv_level_1: pcfg-pull-none-drv-level-1 {
35 pcfg_pull_none_drv_level_2: pcfg-pull-none-drv-level-2 {
41 pcfg_pull_none_drv_level_3: pcfg-pull-none-drv-level-3 {
47 pcfg_pull_none_drv_level_4: pcfg-pull-none-drv-level-4 {
53 pcfg_pull_none_drv_level_5: pcfg-pull-none-drv-level-5 {
59 pcfg_pull_none_drv_level_6: pcfg-pull-none-drv-level-6 {
65 pcfg_pull_none_drv_level_7: pcfg-pull-none-drv-level-7 {
71 pcfg_pull_none_drv_level_8: pcfg-pull-none-drv-level-8 {
77 pcfg_pull_none_drv_level_9: pcfg-pull-none-drv-level-9 {
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z196/
Dextended.json7 …iption": "A directory write to the Level-1 D-Cache directory where the returned cache line was sou…
14 …iption": "A directory write to the Level-1 I-Cache directory where the returned cache line was sou…
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
28 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache"
42 …on": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced…
49 …ion": "A directory write to the Level-1 D-Cache directory where the returned cache line was source…
56 …ion": "A directory write to the Level-1 I-Cache directory where the returned cache line was source…
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …on": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced…
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z15/
Dextended.json7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
21 …he data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on th…
28 …was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-me…
35 …"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
42 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
56 …ruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cach…
63 …n": "A directory write to the Level-1 Instruction cache directory where the returned cache line wa…
70 …cDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
77 …he Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
84 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
[all …]
/Linux-v5.15/drivers/scsi/
Dscsi_logging.h47 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) \ argument
49 if (unlikely((SCSI_LOG_LEVEL(SHIFT, BITS)) > (LEVEL))) \
56 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) do { } while (0) argument
64 #define SCSI_LOG_ERROR_RECOVERY(LEVEL,CMD) \ argument
65 SCSI_CHECK_LOGGING(SCSI_LOG_ERROR_SHIFT, SCSI_LOG_ERROR_BITS, LEVEL,CMD);
66 #define SCSI_LOG_TIMEOUT(LEVEL,CMD) \ argument
67 SCSI_CHECK_LOGGING(SCSI_LOG_TIMEOUT_SHIFT, SCSI_LOG_TIMEOUT_BITS, LEVEL,CMD);
68 #define SCSI_LOG_SCAN_BUS(LEVEL,CMD) \ argument
69 SCSI_CHECK_LOGGING(SCSI_LOG_SCAN_SHIFT, SCSI_LOG_SCAN_BITS, LEVEL,CMD);
70 #define SCSI_LOG_MLQUEUE(LEVEL,CMD) \ argument
[all …]
/Linux-v5.15/tools/power/x86/intel-speed-select/
Disst-display.c84 static void format_and_print_txt(FILE *outf, int level, char *header, in format_and_print_txt() argument
91 if (!level) in format_and_print_txt()
94 if (level == 1) { in format_and_print_txt()
97 for (i = 0; i < level - 1; ++i) in format_and_print_txt()
112 static void format_and_print(FILE *outf, int level, char *header, char *value) in format_and_print() argument
119 format_and_print_txt(outf, level, header, value); in format_and_print()
123 if (level == 0) { in format_and_print()
132 for (i = 0; i < level; ++i) in format_and_print()
136 if (last_level == level) in format_and_print()
140 if (last_level != level) in format_and_print()
[all …]
/Linux-v5.15/arch/x86/kvm/mmu/
Dtdp_iter.c8 * Recalculates the pointer to the SPTE for the current GFN and level and
13 iter->sptep = iter->pt_path[iter->level - 1] + in tdp_iter_refresh_sptep()
14 SHADOW_PT_INDEX(iter->gfn << PAGE_SHIFT, iter->level); in tdp_iter_refresh_sptep()
18 static gfn_t round_gfn_for_level(gfn_t gfn, int level) in round_gfn_for_level() argument
20 return gfn & -KVM_PAGES_PER_HPAGE(level); in round_gfn_for_level()
30 iter->level = iter->root_level; in tdp_iter_restart()
32 iter->gfn = round_gfn_for_level(iter->next_last_level_gfn, iter->level); in tdp_iter_restart()
58 * Given an SPTE and its level, returns a pointer containing the host virtual
62 tdp_ptep_t spte_to_child_pt(u64 spte, int level) in spte_to_child_pt() argument
66 * last-level entry. in spte_to_child_pt()
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/arm64/
Darmv8-common-and-microarch.json9 "PublicDescription": "Level 1 instruction cache refill",
12 "BriefDescription": "Level 1 instruction cache refill"
15 "PublicDescription": "Attributable Level 1 instruction TLB refill",
18 "BriefDescription": "Attributable Level 1 instruction TLB refill"
21 "PublicDescription": "Level 1 data cache refill",
24 "BriefDescription": "Level 1 data cache refill"
27 "PublicDescription": "Level 1 data cache access",
30 "BriefDescription": "Level 1 data cache access"
33 "PublicDescription": "Attributable Level 1 data TLB refill",
36 "BriefDescription": "Attributable Level 1 data TLB refill"
[all …]
Darmv8-recommended.json3 "PublicDescription": "Attributable Level 1 data cache access, read",
9 "PublicDescription": "Attributable Level 1 data cache access, write",
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
27 "PublicDescription": "Attributable Level 1 data cache refill, inner",
33 "PublicDescription": "Attributable Level 1 data cache refill, outer",
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency",
51 "PublicDescription": "Attributable Level 1 data cache invalidate",
57 "PublicDescription": "Attributable Level 1 data TLB refill, read",
[all …]
/Linux-v5.15/arch/riscv/kernel/
Dcacheinfo.c27 static struct cacheinfo *get_cacheinfo(u32 level, enum cache_type type) in get_cacheinfo() argument
44 if (this_leaf->level == level && this_leaf->type == type) in get_cacheinfo()
51 uintptr_t get_cache_size(u32 level, enum cache_type type) in get_cache_size() argument
53 struct cacheinfo *this_leaf = get_cacheinfo(level, type); in get_cache_size()
58 uintptr_t get_cache_geometry(u32 level, enum cache_type type) in get_cache_geometry() argument
60 struct cacheinfo *this_leaf = get_cacheinfo(level, type); in get_cache_geometry()
68 unsigned int level, unsigned int size, in ci_leaf_init() argument
71 this_leaf->level = level; in ci_leaf_init()
93 struct device_node *node, unsigned int level) in fill_cacheinfo() argument
100 ci_leaf_init((*this_leaf)++, CACHE_TYPE_UNIFIED, level, size, sets, line_size); in fill_cacheinfo()
[all …]
/Linux-v5.15/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/
Dia_css_bnr2_2.host.c90 unsigned int level) in ia_css_bnr2_2_debug_dtrace() argument
95 ia_css_debug_dtrace(level, "Bayer Noise Reduction 2.2:\n"); in ia_css_bnr2_2_debug_dtrace()
96 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_r", bnr->d_var_gain_r); in ia_css_bnr2_2_debug_dtrace()
97 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_g", bnr->d_var_gain_g); in ia_css_bnr2_2_debug_dtrace()
98 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_b", bnr->d_var_gain_b); in ia_css_bnr2_2_debug_dtrace()
99 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_r", in ia_css_bnr2_2_debug_dtrace()
101 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_g", in ia_css_bnr2_2_debug_dtrace()
103 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_b", in ia_css_bnr2_2_debug_dtrace()
106 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_r", bnr->n_var_gain_r); in ia_css_bnr2_2_debug_dtrace()
107 ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_g", bnr->n_var_gain_g); in ia_css_bnr2_2_debug_dtrace()
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/s390/cf_z10/
Dextended.json7 …iption": "A directory write to the Level-1 I-Cache directory where the returned cache line was sou…
14 …iption": "A directory write to the Level-1 D-Cache directory where the installed cache line was so…
21 …iption": "A directory write to the Level-1 I-Cache directory where the installed cache line was so…
28 …ption": "A directory write to the Level-1 D-Cache directory where the installtion cache line was s…
35 …ription": "A directory write to the Level-1 I-Cache directory where the installed cache line was s…
42 …ription": "A directory write to the Level-1 D-Cache directory where the installed cache line was s…
49 …"PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache…
56 …"PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was …
63 …"PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a …
70 …licDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same …
[all …]
/Linux-v5.15/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/
Dia_css_ynr.host.c116 unsigned int level) in ia_css_nr_dump() argument
119 ia_css_debug_dtrace(level, in ia_css_nr_dump()
121 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
123 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
125 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
127 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
129 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_nr_dump()
136 unsigned int level) in ia_css_yee_dump() argument
138 ia_css_debug_dtrace(level, in ia_css_yee_dump()
140 ia_css_debug_dtrace(level, "\t%-32s = %d\n", in ia_css_yee_dump()
[all …]

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