| /Linux-v6.1/drivers/block/paride/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
9 comment "Parallel IDE high-level drivers"
16 This option enables the high-level driver for IDE-type disk devices
23 EZ-135, EZ-230 and SparQ drives, the Avatar Shark and the backpack
27 tristate "Parallel port ATAPI CD-ROMs"
31 This option enables the high-level driver for ATAPI CD-ROM devices
34 parallel port ATAPI CD-ROM driver, otherwise you should answer M to
38 MicroSolutions backpack CD-ROM drives and the Freecom Power CD. If
39 you have such a CD-ROM drive, you should also say Y or M to "ISO
40 9660 CD-ROM file system support" below, because that's the file
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| /Linux-v6.1/security/selinux/ss/ |
| D | constraint.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * beyond the type-based rules in `te' or the role-based
36 #define CEXPR_L1L2 32 /* low level 1 vs. low level 2 */
37 #define CEXPR_L1H2 64 /* low level 1 vs. high level 2 */
38 #define CEXPR_H1L2 128 /* high level 1 vs. low level 2 */
39 #define CEXPR_H1H2 256 /* high level 1 vs. high level 2 */
40 #define CEXPR_L1H1 512 /* low level 1 vs. high level 1 */
41 #define CEXPR_L2H2 1024 /* low level 2 vs. high level 2 */
|
| /Linux-v6.1/Documentation/userspace-api/media/dvb/ |
| D | ca_high_level.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 The High level CI API
10 This document describes the high level CI API as in accordance to the
14 With the High Level CI approach any new card with almost any random
33 .. code-block:: c
39 #define CA_CI 1 /* CI high level interface */
40 #define CA_CI_LINK 2 /* CI link layer level interface */
41 #define CA_CI_PHYS 4 /* CI physical layer level interface */
42 #define CA_DESCR 8 /* built-in descrambler */
50 This CI interface follows the CI high level interface, which is not
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| /Linux-v6.1/Documentation/driver-api/media/drivers/ |
| D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
34 3. High level hardware driver implementation which coordinates all
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
54 right now the V4L high level interface is the most complete, the
55 sysfs high level interface will work equally well for similar
57 possible to produce a DVB high level interface that can sit right
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|
| /Linux-v6.1/Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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| /Linux-v6.1/drivers/gpu/drm/panfrost/ |
| D | panfrost_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
12 #define GPU_L2_FEATURES 0x004 /* (RO) Level 2 cache features */
88 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
90 #define GPU_TILER_PRESENT_HI 0x114 /* (RO) Tiler core present bitmap, high word */
92 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
93 #define GPU_L2_PRESENT_HI 0x124 /* (RO) Level 2 cache present bitmap, high word */
100 #define GPU_STACK_PRESENT_HI 0xE04 /* (RO) Core stack present bitmap, high word */
103 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
106 #define TILER_READY_HI 0x154 /* (RO) Tiler core ready bitmap, high word */
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| /Linux-v6.1/include/media/ |
| D | cec-pin.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
30 * @received: optional. High-level CEC message callback. Allows the driver
39 void (*high)(struct cec_adapter *adap); member
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| /Linux-v6.1/Documentation/core-api/ |
| D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /Linux-v6.1/drivers/iio/adc/ |
| D | envelope-detector.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * The DAC is used to find the peak level of an alternating voltage input
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
62 int high; member
63 int level; member
72 * (one-bit memory) for if the interrupt has triggered since last calling
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| /Linux-v6.1/Documentation/driver-api/gpio/ |
| D | intro.rst | 16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48 - Output values are writable (high=1, low=0). Some chips also have
50 value might be driven, supporting "wire-OR" and similar schemes for the
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| /Linux-v6.1/drivers/soc/fsl/qbman/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 Compiles in additional checks, to sanity-check the drivers and
30 tristate "BMan self-tests"
32 Compile the BMan self-test code. These tests will
37 bool "High-level API self-test"
41 This requires the presence of cpu-affine portals, and performs
42 high-level API testing with them (whichever portal(s) are affine
46 tristate "QMan self-tests"
48 Compile self-test code for QMan.
51 bool "QMan high-level self-test"
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| /Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
3 This optional 2nd level interrupt controller can be used in SMP configurations
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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|
| D | atmel,aic.txt | 4 - compatible: Should be:
5 - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
7 - "microchip,<chip>-aic" where <chip> can be "sam9x60"
9 - interrupt-controller: Identifies the node as an interrupt controller.
10 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
13 bits[3:0] trigger type and level flags:
14 1 = low-to-high edge triggered.
15 2 = high-to-low edge triggered.
16 4 = active high level-sensitive.
17 8 = active low level-sensitive.
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| D | img,pdc-intc.txt | 10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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|
| D | open-pic.txt | 13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
42 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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|
| /Linux-v6.1/Documentation/devicetree/bindings/watchdog/ |
| D | gpio-wdt.txt | 1 * GPIO-controlled Watchdog
4 - compatible: Should contain "linux,wdt-gpio".
5 - gpios: From common gpio binding; gpio connection to WDT reset pin.
6 - hw_algo: The algorithm used by the driver. Should be one of the
8 - toggle: Either a high-to-low or a low-to-high transition clears
10 left floating or connected to a three-state buffer.
11 - level: Low or high level starts counting WDT timeout,
12 the opposite level disables the WDT. Active level is determined
14 - hw_margin_ms: Maximum time to reset watchdog circuit (milliseconds).
17 - always-running: If the watchdog timer cannot be disabled, add this flag to
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|
| /Linux-v6.1/Documentation/devicetree/bindings/gpio/ |
| D | gpio-nmk.txt | 4 - compatible : Should be "st,nomadik-gpio".
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller.
7 - #gpio-cells : Should be two:
10 - bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered.
12 2 = high-to-low edge triggered.
13 4 = active high level-sensitive.
14 8 = active low level-sensitive.
15 - gpio-controller : Marks the device node as a GPIO controller.
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| D | nvidia,tegra20-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-gpio
18 - nvidia,tegra30-gpio
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|
| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
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|
| /Linux-v6.1/arch/riscv/include/asm/ |
| D | suspend.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /* Saved and restored by low-level functions */
15 /* Saved and restored by high-level functions */
24 /* Low-level CPU suspend entry function */
27 /* High-level CPU suspend which will save context and call finish() */
33 /* Low-level CPU resume entry function */
|
| /Linux-v6.1/Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-codec.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
48 .. flat-table::
49 :header-rows: 0
50 :stub-columns: 0
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|
| /Linux-v6.1/Documentation/devicetree/bindings/regulator/ |
| D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
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|
| /Linux-v6.1/fs/xfs/libxfs/ |
| D | xfs_btree.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2002,2005 Silicon Graphics, Inc.
49 /* Ensure we asked for crc for crc-only magics. */ in xfs_btree_magic()
61 * on x86-64. Yes, gcc-11 fails to inline them, and explicit inlining of these
69 int level, in xfs_btree_check_lblock_siblings() argument
81 if (level >= 0) { in xfs_btree_check_lblock_siblings()
82 if (!xfs_btree_check_lptr(cur, sibling, level + 1)) in xfs_btree_check_lblock_siblings()
96 int level, in xfs_btree_check_sblock_siblings() argument
108 if (level >= 0) { in xfs_btree_check_sblock_siblings()
109 if (!xfs_btree_check_sptr(cur, sibling, level + 1)) in xfs_btree_check_sblock_siblings()
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| /Linux-v6.1/drivers/net/wireless/ath/ath5k/ |
| D | ani.c | 33 * - "noise immunity"
35 * - "spur immunity"
37 * - "firstep level"
39 * - "OFDM weak signal detection"
41 * - "CCK weak signal detection"
61 * ath5k_ani_set_noise_immunity_level() - Set noise immunity level
63 * @level: level between 0 and @ATH5K_ANI_MAX_NOISE_IMM_LVL
66 ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) in ath5k_ani_set_noise_immunity_level() argument
75 static const s8 lo[] = { -52, -56, -60, -64, -70 }; in ath5k_ani_set_noise_immunity_level()
76 static const s8 hi[] = { -18, -18, -16, -14, -12 }; in ath5k_ani_set_noise_immunity_level()
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|
| /Linux-v6.1/Documentation/x86/x86_64/ |
| D | 5level-paging.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 5-level paging
9 Original x86-64 was limited by 4-level paging to 256 TiB of virtual address
14 5-level paging. It is a straight-forward extension of the current page
20 QEMU 2.9 and later support 5-level paging.
22 Virtual memory layout for 5-level paging is described in
26 Enabling 5-level paging
30 Kernel with CONFIG_X86_5LEVEL=y still able to boot on 4-level hardware.
31 In this case additional page table level -- p4d -- will be folded at
34 User-space and large virtual address space
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